at28c010-12dk ATMEL Corporation, at28c010-12dk Datasheet
at28c010-12dk
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at28c010-12dk Summary of contents
Page 1
... When the device is deselected, the CMOS standby current is less than 10 mA. The AT28C010-12DK is accessed like a Static RAM for the read or write cycle without the need for external components. The device contains a 128-byte page register to allow writing 128 bytes simultaneously ...
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... Pin Configuration Block Diagram AT28C010-12DK 2 Pin Name Function A0 - A16 Addresses CE Chip Enable OE Output Enable WE Write Enable I/O0 - I/O7 Data Inputs/Outputs NC No Connect GND FLATPACK Top View A16 1 32 VCC A15 A12 A14 A13 ...
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... Device Operation 4259C–AERO–05/05 • READ: The AT28C010-12DK is accessed like a Static RAM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high impedance state when either high. This dual-line control gives designers flexibility in preventing bus contention in their system. • ...
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... Protection Algorithm). After writing the 3-byte command sequence and after t entire AT28C010-12DK will be protected against inadvertent write operations. It should be noted, that once protected the host may still perform a byte or page write to the AT28C010-12DK. This is done by preceding the data to be written by the same 3-byte command sequence used to enable SDP. • ...
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... Data in. IN AT28C010-12DK WE I OUT High High Z IH OUT X High High Z OUT V No operation ...
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... OL V Output High Voltage OH1 V Output High Voltage CMOS OH2 AT28C010-12DK 6 *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent dam- age to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied ...
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... CE may be delayed AVQV 2. OE may be delayed ELQV AVQV OLQV specified from wichever occurs first ( pF). EHQZ 4. This parameter is characterized and is not 100% tested. AT28C010-12DK AT28C010-12DK Min Max 120 120 ELQV T OLQV T EHQZ T AXQX T AVQV - T ...
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... T DVEH DVWH EHDX WHDX WHOL, EHOL T WPH AT28C010-12DK 8 Max 10 12 Parameter Address, OE Set-up Time Address Hold Time Chip Select Set-up Time Chip Select Hold Time Write Pulse Width (WE or CE) Data Set-up Time Data, OE Hold Time Write Pulse Width High ...
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... AC Write Waveforms WE Controlled CE Controlled 4259C–AERO–05/05 T OHWL T AVWL T WLAX T ELWL T WLWH1 T DVWH T OHEL T AVEL T ELAX T WLEL T ELEH T DVEH AT28C010-12DK T WHOL T WHEH T WPH T WHDX E HOL E HWH T WPH T EHDX 9 ...
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... T Write Pulse Width High WPH Page Mode Write Waveforms T AVWL Notes through A16 must specify the page address during each high to low transition of WE (or CE must be high only when WE and CE are both low. AT28C010-12DK 10 (1)(2) T WPH T WLWH1 T T WHDX ...
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... ANY ADDRESS LOAD LAST BYTE TO LAST ADDRESS Notes: 1. Data Format: I/O7 - I/O0 (Hex); Address Format: A14 - A0 (Hex). 2. Write Protect state will be activated at end of write even if no other data is loaded 128 bytes of data are loaded. AT28C010-12DK (1) (2) WRITES ENABLED (3) ENTER DATA PROTECT STATE 11 ...
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... AT28C010-12DK 12 Figure 2. Protection Disable Algorithm LOAD DATA AA ADDRESS 5555 LOAD DATA 55 ADDRESS 2AAA LOAD DATA 80 ADDRESS 5555 LOAD DATA AA ADDRESS 5555 LOAD DATA 55 ADDRESS 2AAA LOAD DATA 20 ADDRESS 5555 LOAD DATA XX ANY ADDRESS LOAD LAST BYTE LAST ADDRESS Notes: 1. Data Format: I/O7 - I/O0 (Hex); ...
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... After the command sequence has been issued and a page write operation follows, the page address inputs (A7 - A16) must be the same for each high to low transition of WE (or CE must be high only when WE and CE are both low. 4259C–AERO–05/05 (1)(2)(3) T WLWH1 T WPH T WLAX T WHDX DVWH AT28C010-12DK T WHWL2 T WHWL1 13 ...
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... WHDX T OE Hold Time WHOL ( Access Time OLQV t Write Recovery Time WR Notes: 1. These parameters are characterized and not 100% tested. 2. See AC Read Characteristics. Data Polling Waveforms TWHDX AT28C010-12DK 14 (1) T WHOL T OLQV Min Typ Max 4259C–AERO–05/05 Units ns ns ...
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... Toggling either both OE and CE will operate toggle bit. 2. Beginning and ending state of I/O6 will vary. 3. Any addres location may be used but the address should not vary. 4259C–AERO–05/05 ( WHOL OEHP T OLQV AT28C010-12DK Min Typ Max 10 10 150 0 Units ns ns ...
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... Ordering Information t (ns) I (mA) ACC CC Active 120 50 AT28C010-12DK 16 Ordering Code Standby AT28C010-12DK-E 10 AT28C010-12DK-MQ AT28C010-12DK-SV Package Packing Engineering Samples FP32.4 Military Level B Space Level B 4259C–AERO–05/05 ...
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... Packaging Information FP32.435 4259C–AERO–05/05 32F, 32-Lead, Non-Windowed, Ceramic Bottom Brazed Flat Package (Flatpack) Dimensions in Inches and Millimeters MIL-STD-1835 F-18 CONFIG B JEDEC OUTLINE MO-115 AT28C010-12DK 17 ...
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... Atmel does not make any commitment to update the information contained herein. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © Atmel Corporation 2005. All rights reserved. Atmel are the trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Atmel Operations Memory ...