at28bv256 ATMEL Corporation, at28bv256 Datasheet - Page 10
at28bv256
Manufacturer Part Number
at28bv256
Description
256k 32k X 8 Battery-voltage Parallel Eeproms
Manufacturer
ATMEL Corporation
Datasheet
1.AT28BV256.pdf
(18 pages)
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16. Page Mode Characteristics
17. Programming Algorithm
Notes:
18. Software Protected Program Cycle Waveforms
Notes:
10
Symbol
t
t
t
t
t
t
t
t
WC
AS
AH
DS
DH
WP
BLC
WPH
1. Data Format: I/O7 - I/O0 (Hex); Address Format: A14 - A0 (Hex).
2. Data protect state will be re-activated at the end of program cycle.
3. 1 to 64 bytes of data are loaded.
1. A0 - A14 must conform to the addressing sequence for the first three bytes as shown above.
2. A6 through A14 must specify the same page address during each high to low transition of WE (or CE) after the software
3. OE must be high only when WE and CE are both low.
AT28BV256
code has been entered.
Parameter
Write Cycle Time
Address Set-up Time
Address Hold Time
Data Set-up Time
Data Hold Time
Write Pulse Width
Byte Load Cycle Time
Write Pulse Width High
t
AS
LOAD LAST BYTE
LAST ADDRESS
ANY ADDRESS
ADDRESS 2AAA
(1)(2)(3)
LOAD DATA AA
ADDRESS 5555
LOAD DATA A0
ADDRESS 5555
LOAD DATA XX
LOAD DATA 55
t
DS
t
TO
TO
TO
TO
TO
AH
t
WP
(3)
(3)
WRITES ENABLED
ENTER DATA
PROTECT STATE
t
t
DH
WPH
(2)
Min
200
100
50
50
0
0
t
BLC
(1)(2)(3)
t
WC
Max
150
10
0273J–PEEPR–10/06
Units
ms
ns
ns
ns
ns
ns
µs
ns