74VCX16722MTDX Fairchild Semiconductor, 74VCX16722MTDX Datasheet
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74VCX16722MTDX
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74VCX16722MTDX Summary of contents
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... Package Number 74VCX16722MTD MTD64 64-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. © 2005 Fairchild Semiconductor Corporation Features 1.65V–3.6V V supply operation CC 3 ...
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Connection Diagram Functional Description The VCX16722 contains twenty-two D-type flip-flops with 3-STATE standard outputs. The twenty-two flip-flops will store the state of their individual D-type inputs that meet the setup and hold time requirements on the LOW-HIGH Clock (CLK) transition, ...
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Absolute Maximum Ratings Supply Voltage ( Input Voltage ( Output Voltage ( Outputs 3-STATE Outputs Active (Note 3) DC Input Diode Current ( Output Diode Current (I ...
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DC Electrical Characteristics (2.3V Symbol Parameter V HIGH Level Input Voltage IH V LOW Level Input Voltage IL V HIGH Level Output Voltage OH V LOW Level Output Voltage OL I Input Leakage Current I I 3-STATE Output Leakage OZ ...
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AC Electrical Characteristics Symbol Parameter f Maximum Clock Frequency MAX Propagation Delay Clock to Bus PHL PLH Output Enable Time PZL PZH Output Disable Time PLZ PHZ t Setup Time S ...
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Capacitance Symbol Parameter C Input Capacitance IN C Input/Output Capacitance I/O C Power Dissipation Capacitance Characteristics OUT OUT FIGURE 1. Characteristics for Output - Pull Up Driver FIGURE 2. Characteristics for Output - Pull Down Driver ...
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AC Loading and Waveforms TEST PLH PHL PZL PLZ PZH PHZ FIGURE 4. Waveform for Inverting and Non-inverting Functions t t 2.0ns, 10 FIGURE 6. 3-STATE Output ...
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Physical Dimensions inches (millimeters) unless otherwise noted 64-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the ...