lt3641 Linear Technology Corporation, lt3641 Datasheet - Page 20

• Manufacturer Part Number: lt3641
• Description: Dual Monolithic Buck Regulator With Power-on Reset And Watchdog Timer
• Manufacturer: Linear Technology Corporation

APPLICATIONS INFORMATION
LT3641
20
The WDO is open-drain output with weak internal pull-up,
similar to the RST pins.
The delay period corresponding to 33 cycles on CWDT, the
watchdog lower boundary (4 cycles on CWDT), and the
watchdog upper boundary (64 cycles on CWDT) are all
related and set by a capacitor, C
pin and ground:
The accuracy of the watchdog timer will be limited by
the accuracy and temperature coeffi cient of the capacitor
C
as probe capacitance, can affect the watchdog timer.
Figure 8a shows the power-on reset timing. Having FB1
or FB2 high starts the CPOR oscillator. After t
responding RST is released. When both RST1 and RST2
are released, the CWDT oscillator starts. Figure 8b shows
the watchdog waveform with the WDI period between t
and t
The CPOR oscillator is disabled and WDO remains high.
Figure 8c shows the watchdog waveform with the WDI
period longer than t
t
The watchdog function can be disabled by tying WDE
above its threshold. In this case, the CWDT pin can be left
fl oating. If neither the watchdog function nor the power-
on reset function is used, both the CWDT and CPOR pin
can be left fl oating.
The accuracy of the CPOR and CWDT capacitors determine
the accuracy of the power-on reset timer and watchdog
timer. The COG or NPO type of ceramic capacitors have
zero temperature coeffi cient and good aging characteris-
tics. Use COG or NPO type of capacitors with fl at DC bias
characteristic up to 1.5V on the CPOR and CWDT pins.
RST
WDT
t
t
t
DLY
WDL
WDU
WDU
when the watchdog upper boundary, t
. Extra parasitic capacitance on the CWDT pin, such
= t
. The WDI falling edge resets the CWDT oscillator.
=
= C
WDU
t
WDU
WDT
16
•
• 37 • 10
⎛
⎝ ⎜
33
64
WDU
⎞
⎠ ⎟
. WDO is asserted for a period of
6
⎛
⎝ ⎜
F
s
⎞
⎠ ⎟
WDT
, between the CWDT
WDU
RST
, expires.
, the cor-
WDL
Figure 8. Power-On Reset and Watchdog Timing
CWDT
CWDT
CWDT
CPOR
CPOR
CPOR
RST2
RST1
WDO
WDO
WDI
WDI
FB2
FB1
64 CYCLES
64 CYCLES 64 CYCLES
20ms/DIV
(8a)
50ms/DIV
(8b)
(8c)
1ms/DIV
64 CYCLES
WD STARTS
WD STARTS
3641 F09a
3641 F09b
3640 F09c
3641f