lt3032 Linear Technology Corporation, lt3032 Datasheet - Page 11

• Manufacturer Part Number: lt3032
• Description: Dual 150ma Positive/negative Low Noise Low Dropout Linear Regulator
• Manufacturer: Linear Technology Corporation

PIN FUNCTIONS
OUTP (Pin 1): Positive Output. This output supplies power
to the positive side load. A minimum output capacitor of
2.2μF is required to prevent oscillations. Larger output
capacitors are required for applications with large
transient loads to limit peak voltage transients. See the
Applications Information section for more information
on output capacitance, bypass capacitance, and reverse
output characteristics.
ADJP (Pin 2): Positive Adjust. This is the input to the positive
side error amplifi er. This pin is internally clamped to ±7V.
It has a typical bias current of 30nA which fl ows into the
pin (see curve of ADJP Pin Bias Current vs Temperature
in the Typical Performance Characteristics). The ADJP
pin voltage is 1.22V referenced to ground and the output
voltage range is 1.22V to 20V.
BYPP (Pin 3): Positive Bypass. The BYPP pin is used to
bypass the reference of the positive side regulator to achieve
low noise performance. The BYPP pin is clamped internally
to ±0.6V (one V
will bypass the reference to lower the output voltage noise.
A maximum value of 0.01μF is used for reducing output
voltage noise to a typical 20μV
bandwidth. If not used, this pin must be left unconnected.
GND (Pins 4, 5, Exposed Pad Pin 15): Ground. One of
the DFN’s exposed backside pads (Pin 15) is an electrical
connection to ground. To ensure proper electrical and
thermal performance, solder Pin 15 to the PCB’s ground
and tie directly to Pins 4 and 5. Connect the bottom of
the positive and negative output voltage setting resistor
dividers directly to Pins 4 and 5 for optimum load regulation
performance.
INN(Pin 6, 9, Exposed Pad Pin 16): Negative Input. The
DFN package’s second exposed backside pad (Pin 16) is
an electrical connection to INN. To ensure proper electrical
and thermal performance, solder Pin 16 to the PCB’s
negative input supply and tie directly to Pins 6 and 9.
Power is supplied to the negative side of the LT3032 through
the INN pins. A bypass capacitor is required on this pin if
it is more than six inches away from the main input fi lter
capacitor. In general, the output impedance of a battery
rises with frequency, so it is advisable to include a bypass
capacitor in battery-powered circuits. A bypass capacitor
in the range of 1μF to 10μF is suffi cient.
BE
). A small capacitor from OUTP to this pin
RMS
over the 10Hz to 100kHz
OUTN(Pin 7): Negative Output. This output supplies power
to the negative side load. A minimum output capacitor
of 1μF is required to prevent oscillations. Larger output
capacitors are required for applications with large tran-
sient loads to limit peak voltage transients. A parasitic
diode exists between OUTN and INN; OUTN can not be
pulled more negative than INN during normal operation,
or more than 0.5V below INN during a fault condition. See
the Applications Information section for more information
on output capacitance and bypass capacitors.
ADJN(Pin 8): Negative Adjust. This is the input to the
negative side error amplifi er. The ADJN pin has a typical
bias current of 30nA that fl ows out of the pin. The ADJN
pin voltage is –1.22V referenced to ground, and the output
voltage range is –1.22V to –20V. A parasitic diode exists
between ADJN and INN. The ADJN pin cannot be pulled
more negative than INN during normal operation, or more
than 0.5V below INN during a fault condition.
SHDNN(Pin 10): Negative Shutdown. The SHDNN pin puts
the negative side into a low power shutdown state. The
SHDNN pin is referenced to ground for regulator control,
allowing the negative side to be driven by either positive
or negative logic. The negative output will be off if the
SHDNN pin is within ±0.8V(typical) of ground. Pulling the
SHDNN pin more than –1.9V or +1.6V(typical) will turn the
negative output on. The SHDNN pin can be driven by 5V
logic or open-collector logic with a pull-up resistor. The
pull-up resistor is required to supply the pull-up current of
the open-collector device, normally several microamperes,
and the SHDNN pin current, typically 3μA out of the pin
(for negative logic) or 6μA into the pin (for positive logic).
If unused, the SHDNN pin must be connected to INN. The
negative output will be shut down if the SHDNN pin is open
circuit. A parasitic diode exists between SHDNN and INN,
the SHDNN pin cannot be pulled more negative than INN
during normal operation, or more than 0.5V below INN
during a fault condition.
BYPN(Pin 11): Negative Bypass. The BYPN pin is used
to bypass the reference of the negative side regulator to
achieve low noise performance. A small capacitor from
OUTN to this pin will bypass the reference to lower the
output voltage noise. A maximum value of 0.01μF is used
for reducing output voltage noise to a typical 30μV
LT3032
11
RMS
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