x9520v20iz-bt1 Intersil Corporation, x9520v20iz-bt1 Datasheet - Page 7

• Manufacturer Part Number: x9520v20iz-bt1
• Description: Fiber Channel/gigabit Ethernet Laser Diode Control For Fiber Optic Modules Triple Dcp, Por, 2kbit Eeprom Memory, Dual Voltage Monitors
• Manufacturer: Intersil Corporation

At both ends of each array and between each resistor
segment there is a CMOS switch connected to the wiper
(R
may be turned on at any one time. These switches are
controlled by the Wiper Counter Register (WCR) (See Figure
6). The WCR is a volatile register.
On power-up of the X9520, wiper position data is
automatically loaded into the WCR from its associated Non
Volatile Memory (NVM) Register. The table below shows the
Initial Values of the DCP WCR’s before the contents of the
NVM is loaded into the WCR.
The data in the WCR is then decoded to select and enable
one of the respective FET switches. A “make before break”
sequence is used internally for the FET switches when the
wiper is moved from one tap position to another.
Hot Pluggability
Figure 7 shows a typical waveform that the X9520 might
experience in a Hot Pluggable situation. On power-up,
V1/VCC applied to the X9520 may exhibit some amount of
ringing, before it settles to the required value.
The device is designed such that the wiper terminal (R
recalled to the correct position (as per the last stored in the
DCP NVM), when the voltage applied to V1/VCC exceeds
V
time, set in the CONSTAT Register - See “Control and Status
Register” on page 12.).
Therefore, if
to settle above V
terminal position is recalled by (a maximum) time:
TRIP1
w
R
R
R
x
1/
2/
0/
) output. Within each individual array, only one switch
100 TAP
256 TAP
DCP
64 TAP
for a time exceeding t
t
trans
TRIP1
is defined as the time taken for V1/VCC
INITIAL VALUES BEFORE RECALL
(Figure 7): then the desired wiper
V1/VCC
0
t
trans
purst
7
V
V
V
H/
H/
(the Power-on Reset
L/
TAP = 255
TAP = 63
TAP = 0
t
FIGURE 7. DCP POWER
trans
Wx
) is
t
+
purst
X9520
t
system hot plug conditions.
DCP Operations
In total there are three operations that can be performed on
any internal DCP structure:
• DCP Nonvolatile Write
• DCP Volatile Write
• DCP Read
A nonvolatile write to a DCP will change the “wiper position”
by simultaneously writing new data to the associated WCR
and NVM. Therefore, the new “wiper position” setting is
recalled into the WCR after V1/VCC of the X9520 is powered
down and then powered back up.
A volatile write operation to a DCP however, changes the
“wiper position” by writing new data to the associated WCR
only. The contents of the associated NVM register remains
unchanged. Therefore, when V1/VCC to the device is
powered down then back up, the “wiper position” reverts to
that last position written to the DCP using a nonvolatile write
operation.
Both volatile and nonvolatile write operations are executed
using a three byte command sequence: (DCP) Slave
Address Byte, Instruction Byte, followed by a Data Byte (See
Figure 9).
A DCP Read operation allows the user to “read out” the
current “wiper position” of the DCP, as stored in the
associated WCR. This operation is executed using the
Random Address Read command sequence, consisting of
the (DCP) Slave Address Byte followed by an Instruction
Byte and the Slave Address Byte again (Refer to Figure 10.).
Instruction Byte
While the Slave Address Byte is used to select the DCP
devices, an Instruction Byte is used to determine which DCP
is being addressed.
purst
. It should be noted that
MAXIMUM WIPER RECALL TIME
V1/VCC (Max)
V
TRIP1
t
t
trans
is determined by
August 20, 2007
FN8206.2