hip2100 Intersil Corporation, hip2100 Datasheet
hip2100
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hip2100 Summary of contents
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... Ordering Information TEMP. PART # RANGE (°C) PACKAGE HIP2100IB -40 to 125 8 Ld SOIC HIP2100IBZ (Note 1) -40 to 125 8 Ld SOIC (Pb-free) M8.15 HIP2100EIB -40 to 125 8 Ld EPSOIC HIP2100EIBZ -40 to 125 8 Ld EPSOIC (Note 1) (Pb-free) HIP2100IR -40 to 125 16 Ld 5x5 QFN ...
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... Pinouts HIP2100 (SOIC, EPSOIC) TOP VIEW EPAD NOTE: EPAD = Exposed PAD. Application Block Diagram PWM CONTROLLER 2 HIP2100 HIP2100IR4 (DFN) TOP VIEW EPAD ...
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... PWM FIGURE 2. FORWARD CONVERTER WITH AN ACTIVE CLAMP 3 HIP2100 UNDER LEVEL SHIFT VOLTAGE UNDER VOLTAGE EPAD (EPSOIC, QFN and DFN PACKAGES ONLY) +48V HIP2100 FIGURE 1. TWO-SWITCH FORWARD CONVERTER +48V HIP2100 HB HO DRIVER HS LO DRIVER SECONDARY CIRCUIT ISOLATION SECONDARY CIRCUIT ISOLATION FN4022.13 ...
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... CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the recommended operating conditions of this specification is not implied. NOTES: 3. The HIP2100 is capable of derated operation at supply voltages exceeding 14V. Figure 16 shows the high-side voltage derating curve for this mode of operation. 4. All voltages referenced to V unless otherwise specified ...
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... Either Output Rise/Fall Time (3V to 9V) Either Output Rise Time Driving DMOS Either Output Fall Time Driving DMOS Minimum Input Pulse Width that Changes the Output Bootstrap Diode Turn-On or Turn-Off Time 5 HIP2100 = 12V 0V, No Load HO, Unless Otherwise Specified (Continued ...
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... HPLH t LPLH HO, LO FIGURE 3. Typical Performance Curves 150°C 0 125° 25° -40°C 0.01 10 100 FREQUENCY (kHz) FIGURE 5. OPERATING CURRENT vs FREQUENCY 6 HIP2100 DESCRIPTION . Bootstrap diode connected to HB HPHL LO t LPHL 0.1 0.01 10 1000 FIGURE FREQUENCY ...
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... TEMPERATURE (°C) FIGURE 9. UNDERVOLTAGE LOCKOUT THRESHOLD vs TEMPERATURE 30 t HPHL t HPLH t LPHL 25 t LPLH TEMPERATURE (°C) FIGURE 11. PROPAGATION DELAYS vs TEMPERATURE 7 HIP2100 (Continued) 500 400 300 200 100 100 150 FIGURE 8. LOW LEVEL OUTPUT VOLTAGE vs TEMPERATURE 0.54 0.5 0.46 DDR 0.42 0.38 HBR 0.34 0.3 100 150 FIGURE 10. UNDERVOLTAGE LOCKOUT HYSTERESIS vs 2 ...
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... FIGURE 13. PEAK PULLDOWN CURRENT vs OUTPUT VOLTAGE ( FIGURE 15. QUIESCENT CURRENT vs VOLTAGE 8 HIP2100 (Continued) 1 0.1 0.01 0.001 -4 1•10 -5 1•10 1•10 0.3 FIGURE 14. BOOTSTRAP DIODE I-V CHARACTERISTICS 120 100 FIGURE 16. V 0.4 ...
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... INDEX NX k AREA 0.10 e BOTTOM VIEW FOR EVEN TERMINAL/SIDE 9 HIP2100 L12.4x4A 12 LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE SYMBOL 0. 0. E1/2 E 0. NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5M-1994. ...
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... Quad Flat No-Lead Plastic Package (QFN) Micro Lead Frame Plastic Package (MLFP) 10 HIP2100 L16.5x5 16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (COMPLIANT TO JEDEC MO-220VHHB ISSUE C) MILLIMETERS SYMBOL MIN NOMINAL 0. θ - NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. ...
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... The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 11 HIP2100 M8.15 (JEDEC MS-012-AA ISSUE C) 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE M ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 12 HIP2100 M8.15C 8 LEAD NARROW BODY SMALL OUTLINE EXPOSED PAD M ...