hip6016cb Intersil Corporation, hip6016cb Datasheet - Page 10

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hip6016cb

Manufacturer Part Number
hip6016cb
Description
Advanced Pwm And Dual Linear Power Control
Manufacturer
Intersil Corporation
Datasheet

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Shutdown
The PWM output does not switch until the soft-start voltage
(V
reference on each linear’s amplifier is clamped to the soft-
start voltage. Holding the SS pin low with an open drain or
collector signal turns off all three regulators.
The ‘11111’ VID code resulting in an INHIBIT, as shown in
Table 1, also shuts down the IC.
Layout Considerations
MOSFETs switch very fast and efficiently. The speed with
which the current transitions from one device to another
causes voltage spikes across the interconnecting impedances
and parasitic circuit elements. The voltage spikes can
degrade efficiency, radiate noise into the circuit, and lead to
device over-voltage stress. Careful component layout and
printed circuit design minimizes the voltage spikes in the
converter. Consider, as an example, the turn-off transition of
the upper PWM MOSFET. Prior to turn-off, the upper
MOSFET was carrying the full load current. During the turn-
off, current stops flowing in the upper MOSFET and is picked
up by the lower MOSFET (and/or parallel Schottky diode).
Any inductance in the switched current path generates a large
voltage spike during the switching interval. Careful component
selection, tight layout of the critical components, and short,
wide circuit traces minimize the magnitude of voltage spikes.
Contact Intersil for evaluation board drawings of the
component placement and printed circuit board.
There are two sets of critical components in a DC-DC
converter using a HIP6016 controller. The power
components are the most critical because they switch large
amounts of energy. The critical small signal components
connect to sensitive nodes or supply critical bypassing
current.
The power components should be placed first. Locate the
input capacitors close to the power switches. Minimize the
length of the connections between the input capacitors and
the power switches. Locate the output inductor and output
capacitors between the MOSFETs and the load. Locate the
PWM controller close to the MOSFETs.
The critical small signal components include the bypass
capacitor for VCC and the soft-start capacitor, C
these components close to their connecting pins on the
control IC. Minimize any leakage current paths from SS node
because the internal current source is only 11 A.
A multi-layer printed circuit board is recommended. Figure
10 shows the connections of the critical components in the
converter. Note that capacitors C
represent numerous physical capacitors. Dedicate one solid
layer for a ground plane and make all critical component
ground connections with vias to this layer. Dedicate another
solid layer as a power plane and break this plane into
smaller islands of common voltage levels. The power plane
should support the input power and output power nodes.
SS
) exceeds the oscillator’s valley voltage. Additionally, the
2-205
IN
and C
OUT
could each
SS
. Locate
HIP6016
Use copper filled polygons on the top and bottom circuit
layers for the phase nodes. Use the remaining printed circuit
layers for small signal wiring. The wiring traces from the
control IC to the MOSFET gate and source should be sized
to carry 1A currents. The traces for OUT2 need only be sized
for 0.2A. Locate C
PWM Controller Feedback Compensation
Both PWM controllers use voltage-mode control for output
regulation. This section highlights the design consideration
for a voltage-mode controller. Apply the methods and
considerations to both PWM controllers.
Figure 11 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage is
regulated to the reference voltage level. The reference
voltage level is the DAC output voltage for the PWM
controller. The error amplifier output (V
the oscillator (OSC) triangular wave to provide a pulse-width
modulated wave with an amplitude of V
node. The PWM wave is smoothed by the output filter (L
and C
The modulator transfer function is the small-signal transfer
function of V
gain and the output filter, with a double pole break frequency
at F
simply the input voltage, V
oscillator voltage, V
Modulator Break Frequency Equations
F LC
The compensation network consists of the error amplifier
internal to the HIP6016 and the impedance networks Z
and Z
+5V
+3.3V
FIGURE 10. PRINTED CIRCUIT BOARD POWER PLANES AND
V
xxxx
xxxx
OUT2
V
LC
IN
=
OUT3
FB
IN
O
---------------------------------------- -
2
and a zero at F
xx
).
. The goal of the compensation network is to provide
x
x x
x
x
x x
x
L O C O
OUT
Q3
1
ISLANDS
C
C
IN
OUT2
/V
OUT2
E/A
OSC
+12V
xxx
xxx
. This function is dominated by a DC
ESR
KEY
close to the HIP6016 IC.
GATE3
V
V
C
.
F ESR
OUT2
VCC
IN2
SS
HIP6016
IN
. The DC gain of the modulator is
ISLAND ON POWER PLANE LAYER
ISLAND ON CIRCUIT PLANE LAYER
VIA CONNECTION TO GROUND PLANE
, divided by the peak-to-peak
SS PGND
C
VCC
OCSET
PHASE
UGATE
LGATE
=
GND
----------------------------------------- -
2
Q1
Q2
ESR C O
E/A
C
IN
xxxx
xxxx
OCSET
1
) is compared with
at the PHASE
R
L
C
CR1
OCSET
OUT1
OUT1
V
IN
OUT1
O

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