aoz1094 Alpha & Omega Semiconductor, aoz1094 Datasheet - Page 13

• Manufacturer Part Number: aoz1094
• Description: Ezbucktm 5a Simple Buck Regulator
• Manufacturer: Alpha & Omega Semiconductor

The power dissipation of inductor can be approximately
calculated by output current and DCR of inductor:
The actual junction temperature can be calculated with
power dissipation in the AOZ1094 and thermal
impedance from junction to ambient:
The maximum junction temperature of AOZ1094 is
145°C, which limits the maximum load current capability.
Please see the thermal de-rating curves for maximum
load current of the AOZ1094 under different ambient
temperature.
The thermal performance of the AOZ1094 is strongly
affected by the PCB layout. Extra care should be taken
by users during design process to ensure that the IC
will operate under the recommended environmental
conditions.
AOZ1094D is a thermally enhanced DFN package, which
utilizes the exposed thermal pad at the bottom to spread
heat through PCB metal. Several layout tips are listed
below for the best electric and thermal performance.
Figure 3 illustrates a PCB layout example of AOZ1094A.
Figure 4 illustrates a PCB layout example of AOZ1094D.
1. Do not use thermal relief connection to the V
2. Input capacitor should be connected to the V
3. A ground plane is preferred. If a ground plane is
4. Make the current trace from LX pins to L to Co to the
5. Pour copper plane on all unused board area and
The AOZ1094A is standard SO-8 package. The
P
T
Rev. 1.3 October 2010
junction
inductor_loss
the PGND pin. Pour a maximized copper area to
the PGND pin and the V
dissipation.
and the PGND pin as close as possible.
not used, separate PGND from AGND and connect
them only at one point to avoid the PGND pin noise
coupling to the AGND pin.
PGND as short as possible.
connect it to stable DC nodes, like V
V
OUT
.
=
(
P
=
total_loss
I
O
2
×
R
–
inductor
P
IN
inductor_loss
pin to help thermal
×
1.1
IN
, GND or
) Θ
×
JA
IN
IN
www.aosmd.com
and
pin
6. The two LX pins are connected to internal PFET
7. Keep sensitive signal trace far away form the LX
8. For the DFN package, thermal pad must be soldered
drain. They are low resistance thermal conduction
path and most noisy switching node. Connected a
copper plane to LX pin to help thermal dissipation.
This copper plane should not be too larger otherwise
switching noise may be coupled to other part of
circuit.
pins.
to the PCB metal. When multiple layer PCB is used,
4 to 6 thermal vias should be placed on the thermal
pad and connected to PCB metal on other layers to
help thermal dissipation.
Figure 4. AOZ1094 (DFN-8) PCB Layout
Figure 3. AOZ1094 (SO-8) PCB Layout
AOZ1094
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