mc3phacvp Freescale Semiconductor, Inc, mc3phacvp Datasheet - Page 31

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mc3phacvp

Manufacturer Part Number
mc3phacvp
Description
Mc3phac Motor Control Unit
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Optoisolated RS232 Interface Application Example
Some motor control systems have the control electronics operating at the same potential as the high
voltage bus. Connecting a PC to that system could present safety issues, due to the high voltage potential
between the motor control system and the PC.
used with the MC3PHAC to isolate the serial port of the PC from the motor control system.
The circuit in
terminal interface provides a margin of safety between the motor control system and a personal computer.
The EIA RS232 specification states the signal levels can range from ±3 to ±25 volts. A Mark is defined by
the EIA RS232 specification as a signal that ranges from –3 to –25 volts. A Space is defined as a signal
that ranges from +3 to +25 volts. Therefore, to meet the RS232 specification, signals to and from a
terminal must transition through 0 volts as it changes from a Mark to a Space. Breaking the circuit down
into an input and output section simplifies the explanation of the circuit.
To send data from a PC to the MC3PHAC, it is necessary to satisfy the serial input of the MC3PHAC. In
the idle condition, the serial input of the MC3PHAC must be at a logic 1. To accomplish that, the transistor
in U1 must be turned off. The idle state of the transmit data line (TxD) from the PC serial port is a Mark
(–3 to –25 volts). Therefore, the diode in U1 is off and the transistor in U1 is off, yielding a logic 1 to the
MC3PHAC’s serial input. When the start bit is sent to the MC3PHAC from the PC’s serial port, the PC’s
TxD transitions from a Mark to a Space (+3 to +25 volts), thus forward biasing the diode in U1. Forward
biasing the diode in D1 turns on the transistor in U1, providing a logic 0 to the serial input of the
MC3PHAC. Simply stated, the input half of the circuit provides input isolation, signal inversion, and level
Freescale Semiconductor
operating conditions, this timeout will cause the Fault state to be automatically exited to the
PWM0RPM state, where motion will once again be initiated if a CmdFwd or CmdRev has been
received. The exceptions to this rule are the cases when the Fault state was entered from the
PWMHighZ or PWMOFF states, in which case, exiting from the Fault state will return back to these
states.
CON/CANNON9
FEMALE
J1
Figure 19
5
9
4
8
3
7
2
6
1
GND
DTR
TxD
RTS
RxD
is the schematic of a half-duplex optoisolated RS232 interface. This isolated
~+12 V
1N4148
D3
MC3PHAC Monolithic Intelligent Motor Controller, Rev. 2
ISOLATION BARRIER
Figure 19. Optoisolated RS232 Circuit
D2
1N4148
R3
4.7 kΩ
1N4148
D1
HALF-DUPLEX, MAXIMUM 9600 BAUD
+
C1
2.2 µF/50 V
1 kΩ
R1
Figure 19
RS232 ISOLATED
4
5
1
2
4N35
4N35
U1
U2
is an example of a simple circuit that can be
Optoisolated RS232 Interface Application Example
1
2
4
5
330 Ω
R4
+5 V
R2
1 kΩ
+5 V
TO MC3PHAC PIN 16
TO MC3PHAC PIN 17
31

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