uaa2067g NXP Semiconductors, uaa2067g Datasheet - Page 7

• Manufacturer Part Number: uaa2067g
• Description: Image Reject 1800 Mhz Transceiver For Dect Applications
• Manufacturer: NXP Semiconductors

Philips Semiconductors
FUNCTIONAL DESCRIPTION
Receive section
The circuit contains a balanced low-noise amplifier
followed by two high dynamic range mixers. The local
oscillator signals, shifted in phase to 0 and 90 mix the
amplified RF signal to the I and Q channels.These two
channels are buffered, phase shifted by 45 and 135
respectively, amplified and recombined internally to realize
the image rejection. Signals at the RF input at RFLO
frequencies are rejected through the signal processing
while signals at the RFLO + IF frequencies form the
IF signals.
An image rejection of typically 34 dB is obtained for an IF
between 100 and 120 MHz.
Balanced signals are used for minimizing crosstalk due to
package parasitics. The IF output is single-ended.
The typical load is 50 .
Fast switching, on/off of the receive section is controlled
by the hardware input PDRX.
RFLO section
The high-frequency oscillator (RFLO oscillator) supplies
the local oscillator signal for the down-conversion (receive)
and up-conversion (transmit) mixers. This VCO uses an
on-chip regulator for a power-supply voltage-independent
output frequency. The buffered VCO signal is fed into a
phase shifter and an off-chip prescaler-synthesizer.
The output signal of the phase-shifter is used for driving
the RX and TX mixers. Due to the good isolation in the
buffer stages, a very small change in VCO frequency is
obtained when switching the RX and TX mixers on.
Fast switching, on/off of the oscillator section is controlled
by the hardware input PDRFLO.
IFLO section
The low-frequency oscillator (IFLO oscillator) internally
supplies the local oscillator signal to the single-sideband
transmit mixer. The buffered VCO signal is fed into a
phase shifter. The output signal of the phase-shifter is
used for driving the TX mixers.
Due to the good isolation in the buffer stages, a very small
change in VCO frequency is obtained when switching the
TX mixer on.
Fast switching on/off of the oscillator section is controlled
by the hardware input PDIFLO input.
1996 Oct 22
Image reject 1800 MHz transceiver
for DECT applications
IF
7
Transmit section
The circuit contains two balanced mixers, each of which is
driven by the RFLO and IFLO signals. The output signal of
the two mixers is summed and buffered to obtain the single
upper-sideband signal at frequency RFLO + IFLO.
With the use of an off-chip time constant, the ramping
circuit defines the power ramp-up and ramp-down of the
pre-amplifier output signal.
Balanced signals are used for minimizing crosstalk due to
package parasitics.
Fast switching, on/off, of the transmit section is controlled
by the hardware input PDTX.
The power supply voltage of the transmit mixers, the
adding circuit and ramping circuit is taken from the
V
preamplifier output stage.
OPERATING MODES
To use the IC, all V
supply voltage.
For transceiving a DECT signal, the RFLO and IFLO
sections should be powered-on. After a stable frequency
has been reached (mainly determined by the synthesizer
design), the receiver or transmitter can be powered-on.
GMSK data modulation can be supplied in two different
ways: the data is directly modulated on IFLO or RFLO.
The ramping of the power level can be set with a time
constant that is external to the IC.
Table 1 gives the definition of the polarity of the switching
signals on the receive, the RFLO, the IFLO and the
transmit sections.
CC(MIX)
and GND6 for maximum isolation from the
CC
pins must be connected to the
Product specification
UAA2067G