iru3046 International Rectifier Corp., iru3046 Datasheet - Page 8

• Manufacturer Part Number: iru3046
• Description: Dual Synchronous Pwm Controller With Current Sharing Circuitry And Ldo Controller
• Manufacturer: International Rectifier Corp.

IRU3046
The R
ered for the worst case operation. This is typically given
in the MOSFET data sheet. Ensure that the conduction
losses and switching losses do not exceed the package
ratings or violate the overall thermal budget.
Choose IRF7460 for control MOSFET and IRF7457 for
synchronous MOSFET. These devices provide low on-
resistance in a compact SOIC 8-Pin package.
The MOSFETs have the following data:
The total conduction losses for the master channel is:
The total conduction losses for the slave channel is:
The control MOSFET contributes to the majority of the
switching losses in synchronous Buck converter. The
synchronous MOSFET turns on under zero-voltage con-
dition, therefore the turn on losses for synchronous
MOSFET can be neglected. With a linear approxima-
tion, the total switching loss can be expressed as:
8
IRF7460
V
I
R
q = 1.8 for 1508C
(Junction Temperature)
P
P
P
Where:
V
t
t
T = Switching Period
I
D
LOAD
r
f
90%
10%
DSS
DS(ON)
CON(MASTER)
CON(SLAVE)
SW
DS(OFF)
DS(ON)
V
= Rise Time
= Fall Time
= 10A @ 758C
V
GS
D S
=
= Load Current
Figure 4 - Switching time waveforms.
= 20V
t
V
d
= 10mV @
(ON)
temperature dependency should be consid-
= Drain to Source Voltage at off time
DS(OFF)
2
V
= 0.77W
GS
= 0.85W
=10V
3
t
r
+
T
t
r
t
f
3 I
t
d
IRF7457
V
I
R
q = 1.5 for 1508C
(Junction Temperature)
(OFF)
D
DSS
DS(ON)
LOAD
= 12A @ 708C
= 20V
= 7.5mV @
V
GS
=10V
t
f
---(7)
www.irf.com
From IRF7460 data sheet we obtain:
These values are taken under a certain condition test.
For more detail please refer to the IRF7460 and IRF7457
data sheets.
By using equation (7), we can calculate the switching
losses.
Feedback Compensation
The control scheme for master and slave channels is
based on voltage mode control, but the compensation of
these two feedback loops is slightly different.
The Master channel sets the output voltage and its feed-
back loop should take care of double pole introduced by
the output filter as a regular voltage mode control loop.
The goal is to provide a close loop transfer function with
the highest 0dB crossing frequency and adequate phase
margin. The slave feedback loop acts slightly different
and its goal is using the current information for current
sharing.
The master feedback loop sees the output filter. The out-
put LC filter introduces a double pole, -40dB/decade gain
slope above its corner resonant frequency, and a total
phase lag of 1808 (see Figure 5). The resonant frequency
of the LC filter expressed as follows:
Figure 5 shows gain and phase of the LC filter. Since we
already have 1808 phase shift just from the output filter,
the system risks being unstable.
0dB
Gain
F
IRF7460
t
t
P
P
r
f
LC(MASTER)
SW(MASTER)
SW(SLAVE)
= 6.9ns
= 4.3ns
Figure 5 - Gain and phase of LC filter.
F
= 107.5mW
LC
=
= 44.8mW
-40dB/decade
2p
Frequency
Lo3Co
1
-180
Phase
0
8
8
---(8)
F
LC
Frequency
09/27/02
Rev. 1.9