r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 566

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r5f71374an80fpv

Manufacturer Part Number
r5f71374an80fpv
Description
32-bit Risc Microcomputer Superh?? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Section 14 Serial Communication Interface (SCI)
Rev. 1.00 Sep. 21, 2007 Page 540 of 1124
REJ09B0402-0100
Bit
3
2
1, 0
Bit Name
STOP
MP
CKS[1:0]
Initial
value
0
0
00
R/W
R/W
R/W
R/W
Stop Bit Length
Clock Select 1 and 0
Description
Selects one or two bits as the stop bit length in
asynchronous mode. This setting is used only in
asynchronous mode. It is ignored in clock synchronous
mode because no stop bits are added.
0: One stop bit*
1: Two stop bits*
When receiving, only the first stop bit is checked,
regardless of the STOP bit setting. If the second stop
bit is 1, it is treated as a stop bit, but if the second stop
bit is 0, it is treated as the start bit of the next incoming
character.
Notes: 1. When transmitting, a single 1-bit is added at
Multiprocessor Mode (only in asynchronous mode)
Enables or disables multiprocessor mode. The PE and
O/E bit settings are ignored in multiprocessor mode.
0: Multiprocessor mode disabled
1: Multiprocessor mode enabled
Select the internal clock source of the on-chip baud rate
generator. Four clock sources are available. Pφ, Pφ/4,
Pφ/16 and Pφ/64. For further information on the clock
source, bit rate register settings, and baud rate, see
section 14.3.10, Bit Rate Register (SCBRR).
00: Pφ
01: Pφ/4
10: Pφ/16
11: Pφ/64
Note: Pφ: Peripheral clock
2. When transmitting, two 1 bits are added at the
the end of each transmitted character.
end of each transmitted character.
1
2

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