ld39300 STMicroelectronics, ld39300 Datasheet

no-image

ld39300

Manufacturer Part Number
ld39300
Description
Ultra Low Drop Bicmos Voltage Regulator
Manufacturer
STMicroelectronics
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ld39300DT12
Manufacturer:
ST
0
Part Number:
ld39300DT12-R
Manufacturer:
ALTERA
0
Part Number:
ld39300DT12-R
Manufacturer:
ST
0
Part Number:
ld39300DT12R
Manufacturer:
STM
Quantity:
2 656
Part Number:
ld39300DT18-R
Manufacturer:
ST
Quantity:
20 000
Part Number:
ld39300DT25-R
Manufacturer:
ST
0
Part Number:
ld39300DT33-R
Manufacturer:
ST
Quantity:
2 246
Part Number:
ld39300DT33-R
Manufacturer:
ST
0
Part Number:
ld39300PT-R
Manufacturer:
ST
Quantity:
30 000
Part Number:
ld39300PT-R
Manufacturer:
STMicroelectronics
Quantity:
44 504
Company:
Part Number:
ld39300PT-R
Quantity:
10 000
Part Number:
ld39300PT18-R
Manufacturer:
ST
Quantity:
30 000
Feature summary
Typical application
Order codes
January 2007
3A Guaranteed output current
Ultra low dropout voltage (200mV typ. @ 3A
load, 40mV typ. @600mA load)
Very low quiescent current (1.2mA typ. @ 3A
load, 1µA max @ 25°C in off mode)
Logic-controlled electronic shutdown
Current and thermal internal limit
±
Fixed and ADJ output voltages: 1.22V, 1.8V,
2.5V, 3.3V, ADJ. (*see order code)
Temperature range: -40 to 125°C
Fast dynamic response to line and load
changes
Stable with ceramic capacitor (see paragraph
7.1, 7.2, 7.3)
Available in PPAK and DPAK
Microprocessor power supply
DSPs power supply
Post regulators for switchin suppliers
High efficiency linear regulator
1.5% Output voltage tolerance @ 25°C
LD39300DT12-R
LD39300DT18-R
LD39300DT25-R
LD39300DT33-R
DPAK
Part numbers
Ultra low drop BICMOS voltage regulator
LD39300PT18-R
LD39300PT25-R
LD39300PT33-R
LD39300PT-R
PPAK
Rev. 1
Description
The LD39300 is a fast ultra low drop linear
regulator which operates from 2.5V to 6V input
supply.
A wide range of output options are available. The
low drop voltage, low noise, and ultra low
quiescent current make it suitable for low voltage
microprocessor and memory applications. The
device is developed on a BiCMOS process which
allows low quiescent current operation
independently of output load current.
PPAK
ADJ From 1.22 to 5.0V
Output voltage
1.22V
1.8V
2.5V
3.3V
LD39300
DPAK
www.st.com
1/17
17

Related parts for ld39300

ld39300 Summary of contents

Page 1

... LD39300DT33-R January 2007 Ultra low drop BICMOS voltage regulator PPAK Description The LD39300 is a fast ultra low drop linear regulator which operates from 2. input supply. A wide range of output options are available. The low drop voltage, low noise, and ultra low quiescent current make it suitable for low voltage microprocessor and memory applications ...

Page 2

... Contents 1 Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Typical application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 7 Application notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7.1 External capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7.2 Input capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7.3 Output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7.4 Thermal note . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7.5 Inhibit input operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2/17 LD39300 ...

Page 3

... LD39300 1 Diagram Figure 1. Block diagram (*) Not present on ADJ Versions Diagram 3/17 ...

Page 4

... ESR stability chart) O Inhibit Input Voltage: ON MODE when V (Do not leave floating, not internally pulled down/up) Common ground DPAK Note from 1.22 to 5.0V O =1µF must be located at a distance of not I =4.7µF needed for stability (also refer O ≥ 2V, OFF MODE when V INH INH LD39300 ≤ 0.3V ...

Page 5

... C Capacitors must be placed as close as possible to the IC pins Figure 3. LD39300 Fixed version with inhibit 1 Inhibit Pin is not internally pulled down/up then it must not be left floating. Disable the device when connected to GND positive voltage less than 0.3V Figure 4. LD39300 Adjustable version 2 Set R2 as close as possible to 4 ...

Page 6

... Typical application circuits Figure 5. LD39300 DPAK Figure 6. Timing diagram 6/17 LD39300 ...

Page 7

... LD39300 4 Maximum ratings Table 2. Absolute maximum ratings Symbol V DC Input voltage I V INHIBIT Input voltage INH V DC Output voltage O V ADJ Pin voltage ADJ I Output current O P Power dissipation D T Storage temperature range STG T Operating junction temperature range OP Note: Absolute Maximum Ratings are those values beyond which damage to the device may occur ...

Page 8

... 4.7µ 2. 10mA 2V, unless otherwise INH Min. Typ. Max. 2.5 -1.5 -3 1.22 0.04 = -40 to 125°C 0.1 0.06 0.2 40 200 = 2V INH 1 ±0 100 170 10 LD39300 Unit O(NOM 0.2 % %/A 0 400 2 µ 0.3 V µs ±1 µA dB µV RMS °C ...

Page 9

... LD39300 6 Typical performance characteristics (T = 25° specified) Figure 7. Output voltage vs temperature Figure 9. Dropout voltage vs output current Figure 11. Quiescent current vs temperature +1V 1µ 4.7µ LOAD Figure 8. Figure 10. Quiescent current vs temperature Figure 12. Short circuit current vs temperature Typical performance characteristics ...

Page 10

... 10/17 Figure 14. Stability region vs C & ESR (low Figure 16. Load transient (fall time 5V Figure 18. Line transient V = 3.5V to 5.5V 1µ 4.7µ & ESR O = 3.3V 10mA to 3A 1µ 3.3V 10mA 4.7µF O LOAD O LD39300 = 4.7µF ...

Page 11

... Input capacitor An input capacitor whose minimum value is 1µF is required with the LD39300 (amount of capacitance can be increased without limit). This capacitor must be located a distance of not more than 1cm from the input pin of the device and returned to a clean analog ground. Any good quality ceramic, tantalum or film capacitors can be used for this capacitor ...

Page 12

... These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK trademark. ECOPACK specifications are available at: 12/17 www.st.com. LD39300 ® ...

Page 13

... LD39300 DIM. MIN. A 2.2 A1 0.9 A2 0.03 B 0.4 B2 5.2 C 0. 4.9 G1 2. PPAK MECHANICAL DATA mm. TYP MAX. 2.4 1.1 0.23 0.6 5.4 0.6 0.6 6.2 5.1 6.6 4.7 1.27 5.25 2.7 10.1 0 2.8 Package mechanical data inch MIN. TYP. 0.086 0.035 0.001 0.015 0.204 0.017 0.019 0.236 0.201 0.252 0.185 0.050 0.193 0.093 0.368 0.031 ...

Page 14

... DPAK MECHANICAL DATA mm. TYP MAX. 2.4 1.1 0.23 0.9 5.4 0.6 0.6 6.2 5.1 6.6 4.7 2.28 4.6 10.1 2.8 0.8 1 inch MIN. TYP. MAX. 0.086 0.094 0.035 0.043 0.001 0.009 0.025 0.035 0.204 0.212 0.017 0.023 0.019 0.023 0.236 0.244 0.200 0.252 0.260 0.185 0.090 0.173 0.181 0.368 0.397 0.039 0.110 0.031 0.023 0.039 0068772-F LD39300 ...

Page 15

... LD39300 Tape & Reel DPAK-PPAK MECHANICAL DATA DIM. MIN 12 6.80 Bo 10.40 Ko 2.55 Po 3.9 P 7.9 mm. TYP MAX. 330 13.0 13.2 0.504 0.795 2.362 22.4 6.90 7.00 0.268 10.50 10.60 0.409 2.65 2.75 0.100 4.0 4.1 0.153 8.0 8.1 0.311 Package mechanical data inch MIN. TYP. MAX. 12.992 0.512 0.519 0.882 0.272 0.2.76 0.413 0.417 0.104 ...

Page 16

... Revision history 9 Revision history Table 5. Revision history Date Revision 26-Jan-2007 1 16/17 Initial release. Changes LD39300 ...

Page 17

... LD39300 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

Related keywords