ak5701 AKM Semiconductor, Inc., ak5701 Datasheet - Page 37

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ak5701

Manufacturer Part Number
ak5701
Description
16-bit ?? Stereo Adc With Pll & Mic-amp
Manufacturer
AKM Semiconductor, Inc.
Datasheet

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3. Example of ALC Operation
Table 28
The following registers should not be changed during the ALC operation. These bits should be changed after the ALC
operation is finished by ALC bit = “0” or PMADL=PMADR bits = “0”.
MS0404-E-02
Register Name
LMTH
ZELMN
ZTM1-0
WTM1-0
REF7-0
IVL7-0,
IVR7-0
LMAT1-0
RGAIN1-0
ALC
• LMTH, LMAT1-0, WTM1-0, ZTM1-0, RGAIN1-0, REF7-0, ZELMN
WR (LMAT1-0, RGAIN1-0, ZELMN, LMTH1-0; ALC= “1”)
shows the examples of the ALC setting for mic recording.
WR (ZTM1-0, WTM1-0)
Comment
Limiter detection Level
Limiter zero crossing detection
Zero crossing timeout period
Recovery waiting period
*WTM1-0 bits should be the same data
Maximum gain at recovery operation
Gain of IVOL
Limiter ATT step
Recovery GAIN step
ALC enable
as ZTM1-0 bits
Note : WR : Write
WR (IVL/R7-0)
ALC Operation
Manual Mode
WR (REF7-0)
Figure 39. Registers set-up sequence at ALC operation
Table 28. Example of the ALC setting
* The value of IVOL should be
the same or smaller than REF’s
- 37 -
Data
E1H
91H
01
00
00
00
00
0
1
fs=8kHz
Example:
−4.1dBFS
Operation
Enable
Enable
+30dB
1 step
1 step
16ms
16ms
0dB
Limiter = Zero crossing Enable
Recovery Cycle = 16ms@8kHz
Limiter and Recovery Step = 1
Maximum Gain = +30.0dB
Limiter Detection Level = −4.1dBFS
ALC bit = “1”
(3) Addr=1BH, Data=E1H
(1) Addr=18H&19H, Data=91H
(2) Addr=1AH, Data=00H
(4) Addr=1CH, Data=81H
Data
E1H
91H
01
10
10
00
00
0
1
fs=44.1kHz
−4.1dBFS
Operation
11.6ms
11.6ms
Enable
Enable
+30dB
1 step
1 step
0dB
[AK5701]
2007/08

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