xr16v2750 Exar Corporation, xr16v2750 Datasheet - Page 52

• Manufacturer Part Number: xr16v2750
• Description: High Performance Duart With 64-byte Fifo
• Manufacturer: Exar Corporation

XR16V2750
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
ABSOLUTE MAXIMUM RATINGS.................................................................................. 41
TYPICAL PACKAGE THERMAL RESISTANCE DATA (MARGIN OF ERROR: ± 15%) 41
ELECTRICAL CHARACTERISTICS ............................................................................... 41
PACKAGE DIMENSIONS (48 PIN TQFP - 7 X 7 X 1
PACKAGE DIMENSIONS (32 PIN QFN - 5 X 5 X 0.9
DC E
AC E
R
4.4 INTERRUPT STATUS REGISTER (ISR) - READ-ONLY .................................................................................. 26
4.5 FIFO CONTROL REGISTER (FCR) - WRITE-ONLY......................................................................................... 27
4.6 LINE CONTROL REGISTER (LCR) - READ/WRITE......................................................................................... 29
4.7 MODEM CONTROL REGISTER (MCR) OR GENERAL PURPOSE OUTPUTS CONTROL - READ/WRITE.. 31
4.8 LINE STATUS REGISTER (LSR) - READ ONLY.............................................................................................. 32
4.9 MODEM STATUS REGISTER (MSR) - READ ONLY ....................................................................................... 33
4.10 SCRATCH PAD REGISTER (SPR) - READ/WRITE ....................................................................................... 34
4.11 ENHANCED MODE SELECT REGISTER (EMSR) ......................................................................................... 34
4.12 FIFO LEVEL REGISTER (FLVL) - READ-ONLY............................................................................................. 35
4.13 BAUD RATE GENERATOR REGISTERS (DLL, DLM AND DLD) - READ/WRITE ....................................... 35
4.14 DEVICE IDENTIFICATION REGISTER (DVID) - READ ONLY....................................................................... 35
4.15 DEVICE REVISION REGISTER (DREV) - READ ONLY ................................................................................. 35
4.16 TRIGGER LEVEL REGISTER (TRG) - WRITE-ONLY .................................................................................... 35
4.17 RX/TX FIFO LEVEL COUNT REGISTER (FC) - READ-ONLY ....................................................................... 35
4.18 FEATURE CONTROL REGISTER (FCTR) - READ/WRITE........................................................................... 36
4.19 ENHANCED FEATURE REGISTER (EFR) ..................................................................................................... 37
TA=-40o to +85oC, Vcc is 2.25V to 3.6V................................................................................................................ 41
Unless otherwise noted: TA=-40o to +85oC, Vcc=2.25 - 3.63V, 70 pF load where applicable ................................ 42
EVISION
T
T
T
T
T
T
T
T
F
F
F
F
F
F
F
F
F
F
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
LECTRICAL
LECTRICAL
4.4.1 INTERRUPT GENERATION: ........................................................................................................................................ 26
4.4.2 INTERRUPT CLEARING: ............................................................................................................................................. 26
4.19.1 SOFTWARE FLOW CONTROL REGISTERS (XOFF1, XOFF2, XON1, XON2) - READ/WRITE .............................. 39
9: I
10: T
11: P
12: S
13: A
14: T
15: S
16: UART RESET CONDITIONS FOR CHANNEL A AND B ............................................................................................ 40
13. C
14. M
16. D
15. D
17. R
18. T
19. R
20. R
21. T
22. T
H
NTERRUPT
ISTORY
RANSMIT AND
RIGGER
ARITY SELECTION
CRATCHPAD
UTO
OFTWARE
RANSMIT
RANSMIT
RANSMIT
LOCK
ATA
ATA
ECEIVE
ECEIVE
ECEIVE
ODEM
C
C
RTS H
B
B
HARACTERISTICS
HARACTERISTICS
...................................................................................................................................... 50
T
US
US
T
I
IMING
NPUT
S
R
R
R
ABLE
F
R
R
R
OURCE AND
W
R
EADY
EADY
EADY
LOW
YSTERESIS
EADY
EADY
EADY
EAD
S
RITE
R
/O
WAP
............................................................................................................................................................. 43
S
ECEIVE
UTPUT
& I
& I
& I
ELECT
C
T
T
& I
& I
& I
........................................................................................................................................................ 30
ONTROL
IMING
S
IMING
NTERRUPT
NTERRUPT
NTERRUPT
ELECTION
NTERRUPT
NTERRUPT
NTERRUPT
P
FIFO T
T
................................................................................................................................................ 34
................................................................................................................................................ 37
RIORITY
.............................................................................................................................................. 44
IMING
............................................................................................................................................. 44
F
............................................................................................................. 41
............................................................................................................. 42
UNCTIONS
T
T
T
RIGGER
F
.................................................................................................................................... 34
T
T
T
IMING
IMING
IMING
OR
L
IMING
IMING
IMING
EVEL
C
HANNELS
[N
[FIFO M
[FIFO M
T
........................................................................................................................ 38
[N
[FIFO M
[FIFO M
....................................................................................................................... 27
ABLE AND
ON
ON
-FIFO M
-FIFO M
ODE
ODE
A & B ................................................................................................. 43
ODE
ODE
L
, DMA D
, DMA E
II
EVEL
ODE
, DMA M
, DMA M
ODE
]
S
FOR
]
ELECTION
FOR
NABLED
ISABLED
ODE
ODE
C
C
HANNELS
mm
mm
HANNELS
D
E
]
NABLED
]
ISABLED
) ............................................... 48
FOR
FOR
) .............................................. 49
.......................................................................... 29
C
A & B ......................................................... 45
C
A & B ....................................................... 45
HANNELS
]
HANNELS
]
FOR
FOR
C
C
HANNELS
HANNELS
A & B......................................... 46
A & B........................................ 46
A & B ............................ 47
A & B............................ 47
REV. 1.0.3