isppac-powr1208 Lattice Semiconductor Corp., isppac-powr1208 Datasheet - Page 8

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isppac-powr1208

Manufacturer Part Number
isppac-powr1208
Description
In-system Programmable Power Supply Sequencing Controller And Monitor
Manufacturer
Lattice Semiconductor Corp.
Datasheet

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Lattice Semiconductor
Transient Characteristics
PLD Timing
Digital Glitch
Filter
t
t
t
t
1. External clock 1MHz. Open drain outputs with 2k pull-up resistor to V
Note: All the above parameters apply to signal paths from the digital inputs [IN1-IN4].
CO
SU
H
t
RST
PD
Symbol
Minimum pulse width to transition through
glitch filter.
Clock to Out Delay. Rising edge of clock to
output transition.
Time that input needs to be present when
using a registered function with the clock.
Time that input needs to be held valid after
the clock edge when using a registered
function with the clock.
Propagation delay internal to the
embedded PLD
RESET pulse width
Parameter
Over Recommended Operating Conditions
Applied to IN1-IN4
Stable input before
clock edge (Note 1)
Data valid before clock
(Note 1)
Hold data after clock
1-8
DD
Conditions
.
ispPAC-POWR1208 Data Sheet
Min.
20
25
20
0
Typ.
Max.
300
90
Units
µs
µs
µs
µs
ns
ns

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