co2128-48li-3sp Connect One Ltd., co2128-48li-3sp Datasheet - Page 37

• Manufacturer Part Number: co2128-48li-3sp
• Description: Chip? Co2064, Co2128 And Co2144 Are Full-featured Programmable Ip Communication Controller? Chips That Act As Coprocessors To Offload Security And Ip Connectivity Tasks From Any Host Processor.
• Manufacturer: Connect One Ltd.

Connect One
6.3 Serial Host Interface
iChip supports a full-duplex serial communications link with the host processor. Full EIA -232-
D hardware flow control, including Tx, Rx, CTS, RTS, DTR and DSR, is supported. iChip
supports standard baud rate configurations from 2,400 bps up to 3Mbps on the host
asynchronous serial communications channel. The default baud rate may be changed
permanently by using the AT+iBDRF command. Auto baud rate setting is support ed for all
standard baud rates.
The host interface is a serial DTE interface. Speeds of up to 3Mbps are supported in the
following data format:
6.4 Parallel Host Interface
The parallel interface is a glueless connection mode, in which iChip connects to a host CPU
through a parallel interface using a one byte, full-duplex mailbox latch, allowing the host to
read or write a full byte to/from the iChip. The host software may transfer bytes one at a time
or configure the interface to use DMA. Supported transfer rates are as high as 32 Mbps.
iChip is connected to the parallel interface through the following signals:
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iChip CO2064/CO2128/CO2144 Data Sheet
Mode
Command
SerialNET
nHPI_CS: Parallel chip select signal. When HPI_nCS is LOW, the iChip is selected.
nHPI_RD: When –RD is LOW, iChip reads data from host.
nHPI_WR: When – WR is LOW, iChip writes data to host.
HPI_D0 — HPI_D7: Bi-directional data bus
nHPI_WAIT: HPI wait request
ERR: Parallel error. When HIGH, indicates error on the parallel interface.
HPI_OBE: Parallel output buffer empty. When HIGH, indicates that the output buffer is
empty and iChip can send additional data to host. When iChip sends a data byte, this
signal goes LOW until the host reads the data.
HPI_IBF: Parallel input buffer full. When HIGH, indicates that the input buffer is full and
iChipc cany read a data byte from the host. When iChip reads the data byte, this signal
goes LOW.
Parity
None
Even, Odd
Data Length
(# of bits)
8
7, 8
Table 6-1: Host Data Format
Preliminary
# of Stop Bits
1
1, 1.5, 2
Transmission Length
(# of Bits)
10
9, 10, 11
Hardware Interface
6-2