that1286 THAT Corporation, that1286 Datasheet - Page 4

• Manufacturer Part Number: that1286
• Description: Dual Balanced Line Receiver Ics
• Manufacturer: THAT Corporation

Document 600114 Rev 01
performance opamps with integrated, laser-trimmed
resistors. These designs take advantage of THAT’s
fully complementary dielectric isolation (DI) process
to deliver excellent performance with low current
consumption. The devices are simple to apply in a
wide range of applications.
Resistor Trimming, Values, and CMRR
laser-trimmed, silicon-chromium (Si-Cr), thin-film,
integrated resistors to deliver the precise matching
required to achieve a 90 dB common mode rejection
ratio. Trimming is performed in two cycles, both
using dc inputs. First, gain is set by trimming the
R
pair (R
is trimmed (whichever needs to increase to meet the
required specification).
trimmed to within ±0.005 % of the R
the resistors themselves are on the order of 10 kΩ
(see Figure 1 for actual values, which change with the
specific part), an increase of as little as 0.6 Ω can
reduce the CMRR from over 90 dB to 84 dB. The
better the starting CMRR, the more impact (in dB) a
given added resistance will have.
practice, take care to ensure that all source imped-
ances remain balanced.
traces carrying signals should be balanced in length,
connector resistance should be minimized, and any
input capacitance (including strays) should be
balanced between the + and - legs of the input
circuitry. Note that the additional contact resistance
of some sockets is sufficient to undo the effects of
precision trimming. Therefore, socketing the parts is
not recommended. THAT’s 1200-series InGenius
input stages address many of these difficulties
through a patented method of increasing common-
mode input impedance, and should be considered
for any critical applications.
1
/R
The THAT 1280 series ICs consist of two high
The 1280-series devices rely upon proprietary,
2
To achieve 90 dB CMRR, the R
Therefore, to achieve this high CMRR in
pair. Then, CMRR is set by trimming the other
In+
Figure 3. Representative input protection circuit
3
/R
4
). Generally, only one resistor of each pair
V
EE
V
CC
R
3
Tel: [phone]; Fax: [phone]; Web: www.thatcorp.com
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; USA
To accomplish this, PCB
R
+
-
4
V
EE
1
/R
V
CC
2
Copyright © 2007, THAT Corporation
3
/R
ratio. Since
Theory of Operation
4
Ref
ratio is
Page 4 of 10
®
the two resistor divider ratios are tightly controlled,
but the actual value of any individual resistor is not.
The initial tolerance of the resistors is quite wide, so
it is possible for any given resistor to vary over a
surprisingly wide range. Lot-to-lot variations of up to
±30 % are to be expected.
Input Considerations
against input overload via an unusual arrangement of
diodes connecting the + and - input pins to the
power supply pins. The circuit of Figure 3 shows the
arrangement used for the R
applies to the other side. The zener diodes prevent
the protection network from conducting until an
input pin is raised at least 50 V above V
50V below V
the devices without constraining the allowable signal
swing at the input pins. The reference (and sense)
pins are protected via more conventional reverse-
biased diodes which will conduct if these pins are
raised above V
prevent RF from reaching the devices, THAT recom-
mends the circuit of Figure 4. C
be located close to the point where the input signal
comes into the chassis, preferably directly on the
connector. The unusual circuit design is intended to
minimize the unbalancing impact of differences in
the values of C
from each input to chassis ground to depend primar-
ily on the value of C
mately ten times less sensitive to mismatches
between C
approach in which the junction of C
grounded directly. An excellent discussion of input
stage grounding can be found in the June 1995 issue
of the Journal of the Audio Engineering Society, Vol.
43, No. 6, in articles by Stephen Macatee,
Whitlock, and others.
internal resistor ratios, coupled with the uncertainty
In+
In-
A further consideration is that after trimming,
The 1280-series devices are internally protected
To reduce risk of damage from ESD, and to
Note that because of the tight matching of the
47p
C3
4
Figure 4. RFI and supply bypassing
EE
and C
. Thus, the protection networks protect
CC
470p
C4
470p
C5
4
or below V
and C
5
3
. The circuit shown is approxi-
than the more conventional
Dual Balanced Line Receiver ICs
5
by forcing the capacitance
2/6
3/5
100n
EE
C2
100n
3
.
C1
/R
In-
In+
V
4
V
V
CC
CC
3
V
EE
side; a similar one
11
EE
through C
Sens
4
Ref
THAT 1280 Series
12/10
14/8
Out
THAT
1286/
1283/
1280
U1
CC
4
13/9
or lowered
and C
5
should
Out
5
Bill
is