ht82k94e Holtek Semiconductor Inc., ht82k94e Datasheet - Page 21

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ht82k94e

Manufacturer Part Number
ht82k94e
Description
Ht82k94e/ht82k94a -- Usb Multimedia Keyboard Encoder 8-bit Mcu
Manufacturer
Holtek Semiconductor Inc.
Datasheet

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There are some timing constrains and usages illustrated here. By setting the MISC register, MCU can perform reading,
writing and clearing actions. There are some examples shown in the following table for endpoint FIFO reading, writing
and clearing.
Note:
USB/PS2 Status and Control Register
The register is used to indicate there are USB suspend, USB resume and USB reset signal in USB bus. Also user can
output a high pulse in RMWK bit to wake-up the PC for USB remote function.
Rev. 1.90
Read FIFO0 sequence
Write FIFO1 sequence
Check whether FIFO0 can be read or not
Check whether FIFO1 can be written or not
Read 0-sized packet sequence form FIFO0
Write 0-sized packet sequence to FIFO1
Bit No.
0
1
2
3
4
5
6
7
*: There are 2 s existing between 2 reading action or between 2 writing action
RESUME
PS2DAO
PS2CKO
PS2DAI
PS2CKI
RMWK
Label
SUSP
URST
Actions
R/W
R/W
W
W
W
R
R
R
R
Read only, USB suspend indication. When this bit is set to 1 (set by SIE), it indi-
cates the USB bus enters suspend mode. The USB interrupt is also triggered on any
changes of this bit.
USB remote wake-up command. It is set by MCU to force the USB host leaving the
suspend mode. When this bit is set to 1 , 2 s delay for clearing this bit to 0 is
needed to insure the RMWK command is accepted by SIE.
USB reset indication. This bit is set/cleared by USB SIE. This bit is used to detect
which bus (PS2 or USB) is attached. When the URST is set to 1 , this indicates that
a USB reset has occurred (the attached bus is USB) and a USB interrupt will be ini-
tialized.
USB resume indication. When the USB leaves the suspend mode, this bit is set to
RESUME is set by the SIE, an interrupt will be generated to wake-up the MCU. In or-
der to detect the suspend state, the MCU should set the USBCKEN and clear
SUSP2 (in SCC register) to enable the SIE detecting function. The RESUME will be
cleared while the SUSP is going 0 . When the MCU is detecting the SUSP, the RE-
SUME (wakes-up the MCU ) should be remembered and taken into consideration.
Read only, USBD-/DATA input
Read only, USBD+/CLK input
Data for driving the USBD-/DATA pin (Default= 1 )
Data for driving the USBD+/CLK pin (Default= 1 )
1 (set by SIE). This bit will appear 20ms waiting for the MCU to detect. When the
00H 01H delay 2 s, check 41H read* from FIFO0 register and
check not ready (01H) 03H 02H
0AH 0BH delay 2 s, check 4BH write* to FIFO1 register and
check not ready (0BH) 09H 08H
00H 01H delay 2 s, check 41H (ready) or 01H (not ready) 00H
0AH 0BH delay 2 s, check 4BH (ready) or 0BH (not ready) 0AH
00H 01H delay 2 s, check 81H read once (01H) 03H 02H
0AH 0BH delay 2 s, check 0BH 0FH 0DH 08H
USC (1CH) Register
21
MISC Setting Flow and Status
Function
HT82K94E/HT82K94A
April 29, 2008

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