mga-83563-blk Avago Technologies, mga-83563-blk Datasheet - Page 12

• Manufacturer Part Number: mga-83563-blk
• Description: +22 Dbm Psat 3v Power Amplifier For 0.5? 6 Ghz Applications
• Manufacturer: Avago Technologies

signal match impedance, Γ
set of S-parameters in Table 1 for
an inductor value of 1.2 nH is
used since this is the closest
value to the 1.5 nH that was
chosen for L2 in the first design
step.
Avago’s Touchstone program was
used to interpolate the s-param-
eter data and calculate a Γ
0.14 ∠172° for 2.5 GHz.
This Γ
Smith chart in Figure 23 as
Point C, along with an indication
of the area of lower impedance
from this point. (The output
impedance is expected to
decrease under large signal
conditions.) A two-element
matching network consisting of a
shunt capacitor and series
transmission line is chosen to
match the output to 50 ohms.
Figure 23. Initial Output Match for
Small Signal.
The shunt-C, series-line topology
is chosen based on its ability to
cover the expected range of
impedance to be matched and
because it will pass DC bias into
the output pin of the MGA-83563.
(For the latter reason, impedance
matching circuits using series
capacitors are avoided.)
-0.2
0.2
LARGE SIGNAL
-0.5
ml
0.5
point is plotted on the
Output
RF
C (Γ
ml
C
)
MLIN
B
1
-1
1
B
A
C
A (50 Ω)
2
ml
ml
2
-2
. The
of
In some cases, it may be more
practical to implement the series
transmission line element with a
chip inductor. If the series line is
excessively long, the cost of an
additional chip component can be
traded off against circuit board
space. The substitution of an
open-circuit line for the shunt C
may also be possible, thus
eliminating the a capacitor.
Referring to the Smith chart in
Figure 23, the initial output match
for Γ
0.4 pF shunt capacitor followed
by a 0.32-inch length of 50 Ω
microstripline.
DC Bias
A 22 nH RFC is added to the 50 Ω
side of the output matching
circuit to apply bias voltage to the
drain of the second stage. The
RFC is bypassed with a 62 pF
capacitor. A series DC blocking
capacitor, also 62 pF, is added to
the RF output to complete the
bias circuit.
Optimizing the Output Match
To reach the final output
matching circuit for maximum
saturated output power, an input
power of +4 dBm is applied to
saturate the amplifier circuit. The
output matching circuit is then
experimentally optimized by
adjusting the value of the shunt
capacitor and the distance the
capacitor is located along the
output line from the MGA-83563.
During the tuning process, the
saturated output power of the
amplifier is monitored with a
power meter connected to the
amplifier’s output. An ammeter is
used to observe total device DC
current drain (I
of amplifier efficiency. The
desired output match is then
ml
was determined to be a
d
) as an indication
achieved at the tuning point of
maximum P
The optimum output match for
2.5 GHz was achieved with a
shunt capacitor value of 0.9 pF
located 0.08 inches along the 50 Ω
line from the output pin of the
MGA-83563. The final output
circuit is shown in Figure 24.
Figure 24. Final RF Output Match for
the 2.5 GHz Amplifier Tuned for
Maximum P
When tuned for maximum
saturated output power, the small
signal output return loss for the
amplifier was measured as 5.5 dB
at 2.5 GHz.
Input Match
The input return loss without any
external matching was measured
as 7.6 dB (2.4:1 VWSR). For many
applications no further matching
is necessary. If, however, an
improved input match is required,
a simple series inductor is all that
will be needed.
Avago’s Touchstone CAD program
is again used to extrapolate the
2.5 GHz S-parameters in Table 1
and calculate a small signal Γ
0.37 ∠47°. The conjugate of Γ
0.37 ∠ -47°, is plotted on the Smith
chart as Point A in Figure 25.
Input
RF
12
MGA-
83563
sat
sat
.
and minimum I
0.08 in.
50 Ω
ms
0.9 pF
ms
d
Output
.
,
RF
of