74HC27D,653 NXP Semiconductors, 74HC27D,653 Datasheet

IC TRIPLE 3-IN NOR GATE 14SOIC

74HC27D,653

Manufacturer Part Number
74HC27D,653
Description
IC TRIPLE 3-IN NOR GATE 14SOIC
Manufacturer
NXP Semiconductors
Series
74HCr
Datasheet

Specifications of 74HC27D,653

Number Of Circuits
3
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Logic Type
NOR Gate
Number Of Inputs
3
Current - Output High, Low
5.2mA, 5.2mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Product
NOR
Logic Family
HC
High Level Output Current
- 5.2 mA
Low Level Output Current
5.2 mA
Propagation Delay Time
8 ns
Supply Voltage (max)
6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Logical Function
NOR
Number Of Elements
3
Operating Supply Voltage (typ)
5V
Operating Temp Range
-40C to 125C
Package Type
SO
Number Of Outputs
1
Technology
CMOS
Mounting
Surface Mount
Pin Count
14
Operating Temperature Classification
Automotive
Quiescent Current
2uA
Operating Supply Voltage (max)
6V
Operating Supply Voltage (min)
2V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74HC27D-T
74HC27D-T
933714170653
1. General description
2. Features
3. Ordering information
Table 1.
Type number Package
74HC27N
74HC27D
74HC27DB
74HC27PW
74HC27BQ
74HCT27N
74HCT27D
Ordering information
Temperature range Name
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
The 74HC27; 74HCT27 is a high-speed Si-gate CMOS device and is pin compatible with
Low-Power Schottky TTL (LSTTL).
The 74HC27; 74HCT27 provides the 3-input NOR function.
74HC27; 74HCT27
Triple 3-input NOR gate
Rev. 03 — 7 January 2008
Multiple package options
Complies with JEDEC standard no. 7A
ESD protection:
Specified from 40 C to +85 C and from 40 C to +125 C
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
DIP14
SO14
SSOP14
TSSOP14
DHVQFN14 plastic dual in-line compatible thermal enhanced very thin
DIP14
SO14
Description
plastic dual in-line package; 14 leads (300 mil)
plastic small outline package; 14 leads; body width
3.9 mm
plastic shrink small outline package; 14 leads; body width
5.3 mm
plastic thin shrink small outline package; 14 leads; body
width 4.4 mm
quad flat package; no leads; 14 terminals;
body 2.5
plastic dual in-line package; 14 leads (300 mil)
plastic small outline package; 14 leads; body width
3.9 mm
3
0.85 mm
Product data sheet
Version
SOT27-1
SOT108-1
SOT337-1
SOT402-1
SOT762-1
SOT27-1
SOT108-1

Related parts for 74HC27D,653

74HC27D,653 Summary of contents

Page 1

Triple 3-input NOR gate Rev. 03 — 7 January 2008 1. General description The 74HC27; 74HCT27 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). The 74HC27; 74HCT27 provides the 3-input NOR ...

Page 2

... NXP Semiconductors Table 1. Ordering information Type number Package Temperature range Name 74HCT27DB +125 C 74HCT27PW +125 C 74HCT27BQ +125 C 4. Functional diagram mna936 Fig 1. Logic symbol 74HC_HCT27_3 Product data sheet …continued Description SSOP14 plastic shrink small outline package; 14 leads; body width 5.3 mm TSSOP14 plastic thin shrink small outline package ...

Page 3

... NXP Semiconductors 5. Pinning information 5.1 Pinning 74HC27 74HCT27 GND Fig 4. Pin configuration DIP14, SO14, (T)SSOP14 5.2 Pin description Table 2. Pin description Symbol Pin GND 74HC_HCT27_3 Product data sheet 001aag759 (1) The die substrate is attached to this pad using Fig 5. Pin configuration DHVQFN14 ...

Page 4

... NXP Semiconductors 6. Functional description [1] Table 3. Function table Inputs [ HIGH voltage level LOW voltage level don’t care. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage ...

Page 5

... NXP Semiconductors Table 5. Recommended operating conditions Symbol Parameter input rise and fall times ambient temperature amb Type 74HCT27 V supply voltage CC V input voltage I V output voltage input rise and fall times ambient temperature amb 9. Static characteristics Table 6. Static characteristics type 74HC27; 74HCT27 At recommended operating conditions ...

Page 6

... NXP Semiconductors Table 6. Static characteristics type 74HC27; 74HCT27 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 74HCT27 V HIGH-level input voltage V LOW-level input voltage V HIGH-level output voltage 4 LOW-level output voltage 4 input leakage current supply current V ...

Page 7

... NXP Semiconductors Table 7. Dynamic characteristics type 74HC27; 74HCT27 GND = 0 V; for load circuit see Figure Symbol Parameter Conditions C power dissipation per package capacitance 74HCT27 t propagation delay nA, nB nY; see transition time power dissipation per package; PD capacitance V = GND [ the same as t and PHL ...

Page 8

... NXP Semiconductors PULSE GENERATOR Test data is given in Table 9. Definitions test circuit Termination resistance should be equal to output impedance Load capacitance including jig and probe capacitance Load resistance Test selection switch Fig 7. Load circuit for measuring switching times Table 9. Test data Type ...

Page 9

... NXP Semiconductors 12. Package outline DIP14: plastic dual in-line package; 14 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.2 0.51 3.2 inches 0.17 0.02 0.13 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...

Page 10

... NXP Semiconductors SO14: plastic small outline package; 14 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.01 0.069 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 11

... NXP Semiconductors SSOP14: plastic shrink small outline package; 14 leads; body width 5 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. 0.25 0.05 1.65 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT337-1 Fig 10. Package outline SOT337-1 (SSOP14) ...

Page 12

... NXP Semiconductors TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 13

... NXP Semiconductors DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

Page 14

... Data sheet status Product data sheet • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Added type number 74HC27BQ and 74HCT27BQ (DHVQFN14 package) Product specifi ...

Page 15

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 16

... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 4 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 14 14 Revision history ...

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