ml70q5111la Oki Semiconductor, ml70q5111la Datasheet - Page 6

• Manufacturer Part Number: ml70q5111la
• Description: Bluetooth Baseband Controller Ic
• Manufacturer: Oki Semiconductor

1 Semiconductor
CLK and Configuration
Memory I/F
[*1]
[*2]
SCLKFSEL0
SCLKFSEL1
SCLKSEL
Pin Name
Pin Name
BBWSEL
REMAP0
REMAP1
MA[19:0]
MD[15:0]
RESET_OUT
SCLK
RESET
XCLK
MCS0
MCS1
MBS0
MBS1
MOE0
MOE1
MWE
MRE
MA19: M3; MA18: N4; MA17: L5;
MA13: N6; MA12: M6; MA11: K6; MA10: M7; MA9: L7;
MA6: K8;
MD15: N10; MD14: M11; MD13: K10; MD12: N11; MD11: M12; MD10: M13
MD9: L11;
MD2: J13;
Direction
Direction
I/O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
MA5: M9;
MD8: L13;
MD1: J10;
Pull Up/Down
Pull Up/Down
Pull down
Pull down
Pull down
Pull down
Internal
Internal
Pull up
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
MA4: N8;
MD7: K11; MD6: L12;
MD0: H12
Value
Value
Initial
Initial
—
—
—
—
—
—
—
—
—
—
—
H
H
H
H
H
H
H
H
L
6/26
MA16: M4; MA15: K5; MA14: M5
MA3: K9;
Placement
Placement
G10
G13
G11
H10
D13
D11
B10
D10
F11
[*1]
[*2]
Pin
Pin
C4
C5
D9
D5
B4
A5
A9
B9
B8
MA2: M10; MA1: N9;
MD5: K13; MD4: J11;
External address bus
External data bus
External write enable signal output
External read enable signal output
External space 0 chip select
External space 1 chip select
External lower byte select
External upper byte select
External MCS0 device output enable
(MCS0 and MRE OR output)
External MCS1 device output enable
(MCS1 and MRE OR output)
L: 8-bit
H: 16-bit
Master clock (12, 13 or 16 MHz) input pin
(Power level: CMOS level)
User clock input pin
System clock select pin
L: Select CLK divided by internal PLL
H: Select XCLK input signal
Master clock select pin
SCLKFSEL[1:0] = “00” : 12 MHz
Hardware reset pin (Reset = L)
Hardware reset pin (Reset = L), Output
BANK0 region bit width select pin
REMAP select pin during boot up
REMAP[1:0] = “00” Forbidden
MA8: N7;
“01” Stacked Flash ROM
“10” External MCS1 device
“11” External MCS0 device
Description
Description
“01” : 13 MHz
“10” : 16 MHz
“11” : Forbidden
MA7: L8
MA0: L9
MD3: K12;
FEDL70Q5111LA-01
ML70Q5111LA