msx532 Fairchild Semiconductor, msx532 Datasheet - Page 11

• Manufacturer Part Number: msx532
• Description: 532 Port Digital Crosspoint Switch With Lvttl I/o S
• Manufacturer: Fairchild Semiconductor

RCA[8]
RCA[9]
RCB[0]
RCB[1]
RCB[2]
RCB[6:3] RCB[6:3] are reserved.
RCB[7]
RCB[8]
RCB[9]
Introduction
Signal
Description
RCA[8] is set to a one if the I/O buffer is configured as a registered output and is assigned to use Next Neighbor
Clocking. It is zero if Next Neighbor Clocking is disabled. Next Neighbor Clocking allows the I/O buffer to be regis-
tered using the next higher numbered Port number signal as its output clock source. Port 100 on the MSX devices
can use the signal from Port 101 for its output clock if this mode is enabled. Port 531’s Next Neighbor is Port 0.
Next Neighbor Clocking will be disabled by default at reset, so RCA[8] will read as a zero.
RCA[9] is set to a one if the I/O buffer is assigned to use Input Enable 1. It is zero if the I/O buffer is not using Input
Enable 1. All bi-directional I/O buffers must use one of the dedicated input enable pins (IE_0, IE_1, IE_2, or IE_3)
to enable the I/O buffer to drive data into the crosspoint array. As with the dedicated clock pins, each I/O buffer can
access two input enable signals, which will vary depending upon the quadrant of this chip in which the I/O buffer
resides. RCA[9] will read as a zero at reset.
RCB[0] is set to a one if the I/O buffer is assigned to use Input Enable 2. It is zero if the I/O buffer is not using Input
Enable 2. RCB[0] will read as a zero at reset.
RCB[1] is set to a one if the I/O buffer is assigned to use Output Enable 1. It is zero if the I/O buffer is not using
Output Enable 1. All bi-directional I/O buffers must use one of the dedicated output enable pins (OE_0, OE_1,
OE_2, or OE_3) to enable the I/O buffer to drive the pin of the device. As with the dedicated clock pins, each I/O
buffer can access two output enable signals, which will vary depending upon the quadrant of the chip in which the
I/O buffer resides. RCB[1] will read as a zero at reset.
RCB[2] is set to a one if the I/O buffer is assigned to use Output Enable 2. It is zero if the I/O buffer is not using
Output Enable 2. RCB[2] will read as a zero at reset.
RCB[7] is set to a one if the I/O buffer is configured as an inverted output. It is zero if the I/O buffer is not config-
ured as an inverted output. The output of any I/O buffer may be inverted so long as it is not a registered output or
running in Bus Repeater Mode. RCB[7] will read as a zero at reset.
RCB[8] is set to a one if the I/O buffer is configured as a registered input and is using an inverted input clock
source. It is zero if it is not using an inverted input clock. Inputs can use any of the three clock sources described
above and may invert that clock if desired. RCB[8] will read as a zero at reset.
RCB[9] is set to a one if the I/O buffer is configured as a registered output and is using an inverted output clock
source. It is zero if it is not using an inverted output clock. Outputs can use any of the three clock sources
described above and may invert that clock if desired. RCB[9] will read as a zero at reset.
RCA[8]
RCA[9]
RCB[0]
RCB[1]
RCB[2]
RCB[7]
RCB[8]
RCB[9]
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
(Continued)
I/O buffer not using Next Neighbor Clock in RO mode (default)
I/O buffer using Next Neighbor Clock in RO mode
I/O buffer not using Input Enable Source 1 (default)
I/O buffer using Input Enable Source 1
I/O buffer not using Input Enable Source 2 (default)
I/O buffer using Input Enable Source 2
I/O buffer not using Output Enable Source 1 (default)
I/O buffer using Output Enable Source 1
I/O buffer not using Output Enable Source 2 (default)
I/O buffer using Output Enable Source 2
I/O buffer not configured as inverted output (default)
I/O buffer configured as inverted output
I/O buffer not using inverted clock source in RI mode (default)
I/O buffer using inverted clock source in RI mode
I/O buffer not using inverted clock source in RO mode (default)
I/O buffer using inverted clock source in RO mode
Function
Function
Function
Function
Function
Function
Function
Function
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