spt9101 Fairchild Semiconductor, spt9101 Datasheet - Page 3

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spt9101

Manufacturer Part Number
spt9101
Description
125 Msps Sample-and-hold Amplifier
Manufacturer
Fairchild Semiconductor
Datasheet

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ELECTRICAL SPECIFICATIONS
+V
PARAMETERS
Hold Mode Dynamics
Track-and-Hold Switching
Hold-to-Track Switching
Power Supply
1
2
3
4
5
6
Time to recover within rated error band from 160% overdrive.
Sampling bandwidth is defined as the -3 dB frequency response of the input sampler to the hold capacitor when operating in the
sampling mode. It is greater than tracking bandwidth because it does not include the bandwidth of the output amplifier.
Hold mode noise is proportional to the length of time a signal is held. For example, if the hold time (t
noise is typically 3 V (150 mV/s x 20 ns). This value must be combined with the track mode noise to obtain total noise.
Total energy of worst case track-to-hold or hold-to-track glitch.
Typical thermal impedances:
Clocked mode is specified with a 50% clock duty cycle.
Analog input voltage should be limited 0.8 volts to maintain device in linear range.
Worst Harmonic
Worst Harmonic
Worst Harmonic
Worst Harmonic
Sampling Bandwidth
Hold Noise
Droop Rate
Feedthrough Rejection (50 MHz) Full Temp.
Maximum Hold Time, V
Aperture Delay
Aperture Jitter
Pedestal Offset, V
Transient Amplitude
Settling Time to 4 mV
Glitch Product
Acquisition Time to 0.1%
Acquisition Time to 0.01%
+V
-V
Power Dissipation
S
=+5.0 V, -V
V
V
V
V
V
V
V
2 V Output Step
2 V Output Step
S
S
Out
Out
Out
Out
IN
Out
IN
Voltage
Voltage
= 0.5 V p-p
= 0 V
= 2 V p-p
= 2 V p-p
= 2 V p-p
= 2 V p-p
= 2 V p-p
3
S
5
=-5.2 V, R
(RMS)
4
IN
=0 V
2
LOAD
IN
=100 , unless otherwise specified.
=0 V
JC (LCC) = +6 C/W
JA (SOIC) = +85 C/W in still air at +25 C ambient.
TEST
CONDITIONS
23 MHz, 50 MSPS
+25 C
48 MHz, 100 MSPS
+25 C
48 MHz, 100 MSPS
Full Temp.
48 MHz, 125 MSPS
+25 C
-3 dB, +25 ˚C
+25 C
V
Full Temp.
+25 C
+25 C
+25 C
Full Temp.
V
Full Temp.
+25 C
+25 C
+25 C
Full Temp.
Full Temp, Track Mode
Full Temp, Clocked Mode
Full Temp, Track Mode
Full Temp, Clocked Mode
Full Temp, Track Mode
Full Temp, Clocked Mode
IN
IN
=0.0 V, +25 C
= 0 V, Full Temp.
3
LEVEL
TEST
IV
IV
IV
VI
IV
IV
VI
VI
VI
VI
VI
VI
V
V
V
V
V
V
V
V
V
V
V
V
I
MIN
100
SPT9101
150 x t
H
) is 20 ns, the accumulated
TYP
-250
350
200
551
449
-75
-62
-57
-40
-66
<1
10
20
11
54
44
54
44
8
4
7
H
MAX
663
561
-57
-53
25
35
14
16
65
55
65
55
UNITS
dB FS
dB FS
dB FS
dB FS
MHz
mV/s
mV/ s
dB
ns
ps
ps rms
mV
mV
mV
ns
pV-s
ns
ns
ns
mA
mA
mA
mA
mW
mW
SPT9101
12/30/99

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