mt8981de1 Zarlink Semiconductor, mt8981de1 Datasheet - Page 13

no-image

mt8981de1

Manufacturer Part Number
mt8981de1
Description
Digital Switch
Manufacturer
Zarlink Semiconductor
Datasheet
AC Electrical Characteristics
† Timing is over recommended temperature & power supply voltages
‡ Typical figures are at 25
* Contents of Connection Memory are not lost if the clock stops, however, ST-BUS outputs go into the high impedance state.
NB: Frame Pulse is repeated every 512 cycles of C4i.
1
2
3
4
5
6
7
C4i
F0i
BIT
CELLS
N
U
P
T
S
I
Clock Period*
Clock Width High
Clock Width Low
Clock Transition Time
Frame Pulse Setup Time
Frame Pulse Hold Time
Frame Pulse Width
Characteristics
°
C and are for design aid only: not guaranteed and not subject to production testing.
Output
Pin
- Clock Timing (Figures 12 and 13)
C
Channel 31
L
Test Point
Bit o
V
Figure 11 - Output Test Load
Figure 12 - Frame Alignment
SS
Sym.
t
t
t
t
t
t
Zarlink Semiconductor Inc.
t
FPW
CLK
CTT
FPS
CH
CL
FPH
S1
MT8981D
0.020
Min.
220
110
95
20
13
R
L
Typ.
244
122
122
244
20
Max.
300
150
150
200
50
S2
V
SS
V
DD
Units
µs
ns
ns
ns
ns
ns
ns
Channel 0
Bit 7
when testing output levels
or high impedance states.
V
levels or high impedance
states.
SS
S1 is open circuit except
S2 is switched to V
when testing output
Test Conditions
Data Sheet
DD
or

Related parts for mt8981de1