89hpes24n3a Integrated Device Technology, 89hpes24n3a Datasheet - Page 7

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89hpes24n3a

Manufacturer Part Number
89hpes24n3a
Description
24-lane, 3-port Pcie I/o Expansion Switch
Manufacturer
Integrated Device Technology
Datasheet

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Pin Characteristics
IDT 89HPES24N3A Data Sheet
Note: Some input pads of the PES24N3A do not contain internal pull-ups or pull-downs. Unused inputs should be tied off to appropriate
levels. This is especially critical for unused control signal inputs which, if left floating, could adversely affect operation. Also, any input pin left
floating can cause a slight increase in power consumption.
PCI Express Inter-
face
SMBus
General Purpose I/O
Function
Signal
V
V
DD
V
TT
SS
APE
PE
PE0RN[7:0]
PE0RP[7:0]
PE0TN[7:0]
PE0TP[7:0]
PE2RN[7:0]
PE2RP[7:0]
PE2TN[7:0]
PE2TP[7:0]
PE4RN[7:0]
PE4RP[7:0]
PE4TN[7:0]
PE4TP[7:0]
PEREFCLKN[2:1]
PEREFCLKP[2:1]
REFCLKM
MSMBADDR[4:1]
MSMBCLK
MSMBDAT
SSMBADDR[5,3:1]
SSMBCLK
SSMBDAT
GPIO[7:0]
Pin Name
Type
I
I
I
Table 8 Pin Characteristics (Part 1 of 2)
PCI Express Analog Power. PCI Express analog power used by the PLL
and bias generator.
PCI Express Termination Power.
Ground.
Table 7 Power and Ground Pins
Type
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
7 of 31
Buffer
LVPECL/
LVTTL
LVTTL
LVTTL
CML
CML
Name/Description
High Drive
Diff. Clock
Serial link
Type
Input
Input
Input
Input
STI
I/O
STI
STI
STI
2
Resistor
Internal
pull-down
pull-up
pull-up
pull-up
1
pull-up on board
pull-up on board
pull-up on board
pull-up on board
Refer to Table 9
Notes
April 23, 2008

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