89hpes16t4 Integrated Device Technology, 89hpes16t4 Datasheet - Page 9

• Manufacturer Part Number: 89hpes16t4
• Description: 16-lane, 4-port Pcie I/o Expansion Switch
• Manufacturer: Integrated Device Technology

Logic Diagram — PES16T4
IDT 89HPES16T4 Data Sheet
EJTAG / JTAG
1.
2.
SMBus Interface
SMBus Interface
Internal resistor values under typical operating conditions are 54K Ω for pull-up and 251K Ω for pull-down.
Schmitt Trigger Input (STI).
SerDes Input
SerDes Input
SerDes Input
SerDes Input
PCI Express
PCI Express
PCI Express
PCI Express
Function
Functions
System
Master
Switch
Switch
Switch
Switch
Port 0
Port 1
Port 6
Port 7
Slave
Reference
Clocks
SSMBADDR[5,3:1]
MSMBADDR[4:1]
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST_N
MSMBSMODE
SWMODE[2:0]
P01MERGEN
P67MERGEN
PEREFCLKN
PEREFCLKP
Pin Name
MSMBCLK
MSMBDAT
REFCLKM
SSMBCLK
SSMBDAT
RSTHALT
PE0RN[0]
PE0RN[3]
PE1RN[0]
PE1RN[3]
PE6RN[0]
PE6RN[3]
PE7RN[0]
PE7RN[3]
PE0RP[0]
PE0RP[3]
PE1RP[0]
PE1RP[3]
PE6RP[0]
PE6RP[3]
PE7RP[0]
PE7RP[3]
CCLKDS
CCLKUS
PERSTN
Table 8 Pin Characteristics (Part 2 of 2)
Figure 4 PES16T4 Logic Diagram
3
Type
2
2
4
4
O
I
I
I
I
PES16T4
9 of 31
Buffer
LVTTL
Type
I/O
STI
STI
STI
STI
11
Resistor
Internal
pull-up
pull-up
pull-up
pull-up
PE0TP[0]
PE0TN[0]
PE0TP[3]
PE0TN[3]
PE1TP[0]
PE1TN[0]
PE1TP[3]
PE1TN[3]
PE7TP[0]
PE7TN[0]
PE7TP[3]
PE7TN[3]
PE6TP[0]
PE6TN[0]
PE6TP[3]
PE6TN[3]
GPIO[12,11,8:0]
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST_N
V
V
V
V
V
V
DD
DD
DD
DD
SS
TT
PE
CORE
IO
PE
PE
1
External pull-down
Notes
SerDes Output
SerDes Output
SerDes Output
SerDes Output
PCI Express
PCI Express
PCI Express
PCI Express
Power/Ground
General Purpose
Switch
Switch
Switch
Switch
Port 0
Port 1
Port 6
Port 7
JTAG
I/O
March 25, 2008