ocx1601 ETC-unknow, ocx1601 Datasheet - Page 20

• Manufacturer Part Number: ocx1601
• Description: Ocx1601 Crosspoint Switch
• Manufacturer: ETC-unknow

3. Differential I/O Standards
OCX1601 Crosspoint Switch—Advanced Datasheet
3.1 LVPECL
3.2 LVDS
20
The OCX1601 support the two most popular differential signaling standards: Low Voltage Positive Emitter
Coupled Logic (LVPECL) and Low Voltage Differential Signaling (LVDS).
LVPECL is commonly used in video switching applications or those designs requiring transmission of high-
speed clock signals. This is the default I/O supported by the OCX1601 device.
LVDS is typically used in communication systems as high speed, low noise point-to-point links. The OCX1601
conforms to the ANSI/TIA/EIA-644 standard covering electrical specifications for output drivers and receiver
inputs.
From LVPECL
LVPECL is a differential signaling standard that specifies two pins per input or output. The voltage swing
between these two signal lines is approximately 850 mV. The use of a reference voltage or a board
termination voltage is not required.
Transmitting and receiving circuits for LVPECL are shown in Figure 6 with termination resistors
integrated on-chip, thus, removing the need for any external resistors. Integrated Output Attenuation
resistors produce the required LVPECL output swing while providing a 100 ohm output impedance to
minimize return reflections.
LVDS is a differential signaling standard that requires the use of two pins per input or output. It requires
that one data bit is carried through two signal lines. As with all differential signaling standards, LVDS has
an inherent noise immunity over single-ended standards. The voltage swing between two signal lines is
approximately 350mV. The use of a reference voltage or a board termination voltage is not required.
Driver
INN
INP
Note – It is possible to operate the OCX1601 device with V
outputs to closely approximate “true LVDS” levels. Refer to the application note “Operating the
OCX1601 in LVDS Applications” for further details.
Z
Z
0
0
=50
=50
Figure 6
110
R
T
[Rev. 1.8] 3/21/02
OCX1601 Operating in LVPECL Mode
+
–
OCX1601
Device
Switch
Matrix
V
= 3.3V
DD.PAD
DD.
PAD = 2.5V that will allow the
Z
Z
0
0
=50
=50
Fairchild Semiconductor
To Receiver
OUTP
OUTN