stac9251h5taea1xr Integrated Device Technology, stac9251h5taea1xr Datasheet - Page 33

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stac9251h5taea1xr

Manufacturer Part Number
stac9251h5taea1xr
Description
Two-channel High Definition Audio Codec With Modem And Dual Digital Microphone Interfaces
Manufacturer
Integrated Device Technology
Datasheet
IDT™
TWO-CHANNEL HD AUDIO CODEC WITH MODEM & DUAL DIGITAL MICROPHONE INTERFACES
STAC9250/9251
TWO-CHANNEL HD AUDIO CODEC WITH MODEM & DUAL DIGITAL MICROPHONE INTERFACES
5.5.13. AFG GPIOEn
[31:4]
Bit
Bit
[1]
[0]
[3]
[2]
Set1
Get
Bitfield Name
Bitfield Name
Mask3
Mask2
Data1
Data0
Rsvd
Table 35. AFG GPIOEn Command Response Format
Table 33. AFG GPIO Command Response Format
Table 34. AFG GPIOEn Command Verb Format
Verb ID
F16
716
RW
RW
RW
RW
RW
RW
33
R
See bits [7:0] of bitfield table
Reset
Reset
0x0
0x0
0x0
0x0
0x0
Payload
Data for GPIO1 (Pin 34). If this GPIO bit is
configured as Sticky (edge-sensitive) input,
it can be cleared by writing zero (one) here
when the corresponding Polarity Control bit
is zero (one).
Data for GPIO0 (Pin 33). If this GPIO bit is
configured as Sticky (edge-sensitive) input,
it can be cleared by writing zero (one) here
when the corresponding Polarity Control bit
is zero (one).
00
Reserved
Enable for GPIO3:
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
Enable for GPIO2:
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
STAC9250/9251
Description
Description
See bitfield table
0000_0000h
Response
PC AUDIO
V 1.2 01/08

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