stac9723t ETC-unknow, stac9723t Datasheet - Page 29

• Manufacturer Part Number: stac9723t
• Description: Stereo Ac 97 Codec With Multi-codec Option
• Manufacturer: ETC-unknow

SigmaTel, Inc.
5. Low Power Modes
The STAC9721/23 is capable of operating at reduced power when no activity is required. The state of
power down is controlled by the Powerdown Register (26h). There are 7 commands of separate power
down. The power down options are listed in Table 18. The first three bits , PR0..PR2, can be used
individually or in combination with each other, and control power distribution to the ADC’s, DAC’s and
Mixer. The last analog power control bit, PR3, affects analog bias and reference voltages, and can only
be used in combination with PR1, PR2, and PR3. PR3 essentially removes power from all analog
sections of the codec, and is generally only asserted when the codec will not be needed for long periods.
PR0 and PR1 control the PCM ADC’s and DAC’s only. PR2 and PR3 do not need to be "set" before a
PR4, but PR0 and PR1 must be "set" before PR4.
The above figure illustrates one example procedure to do a complete powerdown of STAC9721/23.
From normal operation, sequential writes to the Powerdown Register are performed to power down
STAC9721/23 a piece at a time. After everything has been shut off, a final write (of PR4) can be
executed to shut down the AC-Link. The part will remain in sleep mode with all its registers holding
their static values. To wake up, the AC'97 controller will send an extended pulse on the sync line,
issuing a warm reset. This will restart the AC-Link (resetting PR4 to zero). The STAC9721/23 can also
be woken up with a cold reset. A cold reset will reset all of the registers to their default states. When a
section is powered back on, the Powerdown Control/Status register (index 26h) should be read to verify
that the section is ready (stable) before attempting any operation that requires it.
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values if the software profile of the STAC9721/23 changes, as in the case of silicon level
device modifications.
operational differences between the existing STAC9721/23 and any future versions.
Normal
GRP Bits
PR0
PR1
PR2
PR3
PR4
PR5
PR6
Figure 11
ADC=1
PR0=0
PR0=1
Ready =1
&
ADCs off
PR0
. Example of STAC9721/23 Powerdown/Powerup flow
Digital Interface (AC-Link) powerdown (extnl clk off)
This will allow the software driver to identify any required
PR1=0
DAC=1
PR1=1
&
Table 20
PCM in ADC’s & Input Mux Powerdown
Analog Mixer powerdown (Vref still on)
Default
Analog Mixer powerdown (Vref off)
Data Sheet
DACs off
PR1
PCM out DACs Powerdown
. Low Power Modes
LNLVL_OUT disable
PR2=1
Internal Clk disable
PR2=0
ANL=1
29
&
Function
PR2 or PR3
Analog off
PR4=1
Cold Reset
Warm Reset
Digital I/F off
PR4
Coda-link
Shut off
STAC9721
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