am42dl6402g Meet Spansion Inc., am42dl6402g Datasheet - Page 11

• Manufacturer Part Number: am42dl6402g
• Description: 64 Mbit 8m X8bit/4m X16bit Flash Memory And Sram Preliminary
• Manufacturer: Meet Spansion Inc.

MCP DEVICE BUS OPERATIONS
This section describes the requirements and use of
the device bus operations, which are initiated through
the internal command register. The command register
itself does not occupy any addressable memory loca-
tion. The register is a latch used to store the com-
mands, along with the address and data information
Legend: L = Logic Low = V
Address In, D
Notes:
1. Other operations except for those indicated in this column are inhibited.
2. Do not apply CE#f = V
3. Don’t care or open LB#s or UB#s.
4. If WP#/ACC = V
5. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector/Sector Block Protection
6. If WP#/ACC = V
10
Operation
(Notes 1, 2)
Read from Flash
Write to Flash
Standby
Output Disable
Flash Hardware Reset
Sector Protect
(Note 5)
Sector Unprotect (Note
5)
Temporary Sector
Unprotect
Read from SRAM
Write to SRAM
If WP#/ACC = V
and Unprotection” section.
whether they were last protected or unprotected using the method described in “Sector/Sector Block Protection and Unprotection”. If WP#/ACC =
V
HH,
all sectors will be unprotected.
IN
= Data In, D
IL
ACC
IL
, the boot sectors will be protected. If WP#/ACC = V
, the two outermost boot sectors remain protected. If WP#/ACC = V
(9V), the program time will be reduced by 40%.
IL
, CE1#s = V
V
CE#f
0.3 V
IL
OUT
Table 1. Device Bus Operations—Flash Word Mode, CIOf = V
CC
, H = Logic High = V
X
X
H
H
L
L
L
L
L
= Data Out
CE1#s
IL
H
H
H
H
H
H
H
X
X
X
L
X
X
X
X
L
L
and CE2s = V
CE2s
H
H
H
X
L
X
L
X
L
X
L
X
L
X
L
X
L
IH
, V
ID
P R E L I M I N A R Y
IH
OE# WE#
= 11.5–12.5 V, V
at the same time.
H
X
H
H
X
H
H
X
X
L
L
Am42DL6402G
H
X
H
H
X
X
H
L
L
L
L
A1 = H,
A6 = H,
A1 = H,
A6 = L,
SADD,
SADD,
A0 = L
A0 = L
Addr.
IH
A
A
A
A
HH
X
X
X
X
X
the boot sectors protection will be removed.
IN
IN
IN
IN
needed to execute the command. The contents of the
register serve as inputs to the internal state machine.
The state machine outputs dictate the function of the
device. Tables 1-2 lists the device bus operations, the
inputs and control levels they require, and the result-
ing output. The following subsections describe each of
these operations in further detail.
= 9.0 ± 0.5 V, X = Don’t Care, SADD = Flash Sector Address, A
LB#s
X
X
X
X
X
X
X
X
H
H
L
L
L
L
L
IH
, the two outermost boot sector protection depends on
UB#s
X
X
X
X
X
X
X
X
H
H
L
L
L
L
L
RESET#
V
0.3 V
V
V
V
CC
H
H
H
H
H
L
ID
ID
ID
WP#/ACC
(Note 4)
(Note 4)
(Note 6)
(Note 6)
IH
L/H
L/H
L/H
L/H
H
X
X
January 31, 2003
High-Z
High-Z
High-Z
High-Z
High-Z
DQ7–
D
D
D
DQ0
D
D
D
D
D
D
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
DQ15–
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
D
D
D
DQ8
D
D
D
OUT
OUT
OUT
X
X
IN
IN
IN
IN
=