k4t51043qe-zlcc Samsung Semiconductor, Inc., k4t51043qe-zlcc Datasheet - Page 21

• Manufacturer Part Number: k4t51043qe-zlcc
• Description: 512mb E-die Ddr2 Sdram Specification
• Manufacturer: Samsung Semiconductor, Inc.

K4T51043QE
K4T51083QE
K4T51163QE
Active to active command period for 2KB page
size products
Four Activate Window for 1KB page size products tFAW
Four Activate Window for 2KB page size products tFAW
CAS to CAS command delay
Write recovery time
Auto precharge write recovery + precharge time
Internal write to read command delay
Internal read to precharge command delay
Exit self refresh to a non-read command
Exit self refresh to a read command
Exit precharge power down to any non-read com-
mand
Exit active power down to read command
Exit active power down to read command
(slow exit, lower power)
CKE minimum pulse width
(high and low pulse width)
ODT turn-on delay
ODT turn-on
ODT turn-on(Power-Down mode)
ODT turn-off delay
ODT turn-off
ODT turn-off (Power-Down mode)
ODT to power down entry latency
ODT power down exit latency
OCD drive mode output delay
Minimum time clocks remains ON after CKE asyn-
chronously drops LOW
Parameter
tRRD
tCCD
tWR
tDAL
tWTR
tRTP
tXSNR
tXSRD
tXP
tXARD
tXARDS
t
t
t
t
t
t
t
tANPD
tAXPD
tOIT
tDelay
CKE
AOND
AON
AONPD
AOFD
AOF
AOFPD
Symbol
tRFC + 10
tAC(min)+
tAC(min)+
tAC(min)
tAC(min)
WR+tRP
tIS+tCK
8 - AL
+tIH
min
200
7.5
2.5
10
35
45
7.5
15
2
3
2
2
2
3
8
0
2
2
DDR2-800
tAC(max)
tAC(max)
tAC(max)
tAC(max)
2.5tCK +
2tCK +
21 of 45
+ 0.7
+ 0.6
max
2.5
+1
+1
12
x
x
x
x
2
x
x
x
tRFC + 10
tAC(min)+
tAC(min)+
WR+tRP
tAC(min)
tAC(min)
tIS+tCK
7 - AL
37.5
+tIH
min
200
7.5
2.5
10
50
7.5
15
2
3
2
2
2
3
8
0
2
2
DDR2-667
2tCK+tAC
tAC(max)
tAC(max)
2.5tCK+t
AC(max)
(max)+1
+ 0.6
max
+0.7
2.5
+1
12
2
x
x
x
x
x
x
tRFC + 10
tAC(min)+
tAC(min)+
WR+tRP
tAC(min)
tAC(min)
tIS+tCK
6 - AL
37.5
min
+tIH
200
7.5
7.5
2.5
10
50
15
2
2
3
2
2
2
3
8
0
2
DDR2-533
tAC(max)
tAC(max)
tAC(max)
C(max)+
2tCK+tA
2.5tCK+
+ 0.6
max
2.5
+1
+1
12
x
x
x
2
1
x
x
x
tRFC + 10
tAC(min)+
tAC(min)+
WR+tRP
tAC(min)
tAC(min)
tIS+tCK
6 - AL
37.5
+tIH
min
200
7.5
2.5
10
50
15
10
2
2
3
2
2
2
3
8
0
2
DDR2 SDRAM
Rev. 1.8 July 2007
DDR2-400
2tCK+tAC
tAC(max)
tAC(max)
tAC(max)
(max)+1
2.5tCK+
+ 0.6
max
2.5
+1
+1
12
x
x
2
x
x
x
x
Units
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
13, 25
9, 10
12
23
33
11
36
26
24
9