k4s161622d Samsung Semiconductor, Inc., k4s161622d Datasheet - Page 37

• Manufacturer Part Number: k4s161622d
• Description: 512k X 16bit X 2 Banks Synchronous Dram
• Manufacturer: Samsung Semiconductor, Inc.

DQ
CLOCK
K4S161622D
Burst Read Single bit Write Cycle @Burst Length=2
A
ADDR
10
DQM
CKE
RAS
CAS
/AP
WE
CS
BA
CL=2
CL=3
*Note :
*Note 1
0
Row Active
(A-Bank)
RAa
RAa
1
1. BRSW modes is enabled by setting A
2. When BRSW write command with auto precharge is executed, keep it in mind that t
At the BRSW Mode, the burst length at write is fixed to "1" regaredless of programmed burst length.
Auto precharge is executed at the burst-end cycle, so in the case of BRSW write command,
the next cycle starts the precharge.
2
3
(A-Bank)
CAa
DAa0
Write
DAa0
4
Row Active
(B-Bank)
RBb
RBb
Auto Precharge
5
Read with
(A-Bank)
CAb
6
7
9
"High" at MRS (Mode Register Set).
QAb0 QAb1
8
QAb0 QAb1
9
HIGH
10
Row Active
(A-Bank)
RAc
RAc
11
Auto Precharge
12
Write with
(B-Bank)
CBc
DBc0
DBc0
13
*Note 2
RAS
14
(A-Bank)
should not be violated.
Read
CAd
15
CMOS SDRAM
16
QAd0 QAd1
17
QAd0 QAd1
18
Precharge
(A-Bank)
: Don't care
19