xra00 STMicroelectronics, xra00 Datasheet - Page 14

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xra00

Manufacturer Part Number
xra00
Description
Uhf, Epcglobal Class 1b, Contactless Memory Chip 96 Bit Epc With Inventory And Kill Function
Manufacturer
STMicroelectronics
Datasheet
XRA00
Figure 19. Transmission of XRA00 Answers
XRA00 Answer Bit Cell Variation. Durind
Reader Request Frame command, the XRA00
synchronizes its internal PLL (Phase Lock Loop)
to the Master Clock Time Period, t
Figure 20. XRA00 Answer Bit Cell Variation
Table 4. XRA00 Backscattered Answer Modulation Parameters
14/40
t
t
t
2 / t
0
tagbitcell
tagbitcellTol
Symbol
0
Master Clock Time Period for a single bit sent to the
North American Operation
Master Clock Time Period for a single bit sent to the
European Operation Preliminary Data
XRA00
XRA00
(measured on 96+16+8 bits)
Answer Frame Data Rate (2/t
Answer Frame Data Rate (2/t
Preliminary Data
Slow (+1/8t 0 ) Symbol
Nominal Symbol at Start of Reply
Fast (−1/8t 0 ) Symbol
to Reader data bit cell period
to Reader data bit cell period Tolerance
0
, generated by
0
0
Description
) for North American Operation
) for European Operation
the
100%
100%
t tagbitcell
the Reader. Due to the internal PLL drift in the
XRA00, the answer data bit cell period t
may vary by up to ±1/8t
−1/8t 0
XRA00
XRA00
+1/8t 0
0
.
12.5
Min
120
40
30
±1/8 x t
1/2 x t
66.67
0
Max
16.6
0
160
50
ai10759
tagbitcell
Units
kbps
kbps
ai10758
µs
µs
µs
µs

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