mt18vddf6472y-40b Micron Semiconductor Products, mt18vddf6472y-40b Datasheet
mt18vddf6472y-40b
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mt18vddf6472y-40b Summary of contents
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... DDR SDRAM REGISTERED DIMM Features • 184-pin, dual in-line memory module (DIMM) • Fast data transfer rates: PC3200 • Utilizes 400 MT/s DDR SDRAM components • Registered inputs with one-clock delay • Phase-lock loop (PLL) clock driver to reduce loading • Supports ECC error detection and correction • ...
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... Table 2: Part Numbers and Timing Parameters PART NUMBER MODULE DENSITY MT18VDDF6472G-40B__ 512MB MT18VDDF6472Y-40B__ 512MB MT18VDDF12872G-40B__ MT18VDDF12872Y-40B__ NOTE: All part numbers end with a two-place code (not shown), designating component and PCB revisions. Consult factory for current revision codes. Example: MT18VDDF6472G-40BB1. pdf: 09005aef80f6b913, source: 09005aef80f6b41c DDAF18C64_128x72G ...
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Table 3: Pin Assignment (184-Pin DIMM Front) PIN SYMBOL PIN SYMBOL PIN SYMBOL PIN SYMBOL DQ17 47 REF 2 DQ0 25 DQS2 DQ1 DQS0 ...
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Table 5: Pin Descriptions Pin numbers may not correlate with symbol; refer to Pin Assignment Tables for pin number and symbol information. PIN NUMBERS SYMBOL 10 RESET# 63, 65, 154 WE#, CAS#, RAS# 137, 138 CK0, CK0# 21 157 52, ...
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... Input/ Data I/Os: Data bus. Output SCL Input Serial Clock for Presence-Detect: SCL is used to synchronize the presence-detect data transfer to and from the module. Input Presence-Detect Address Inputs: These pins are used to configure the presence-detect device. SDA Input/ Serial Presence-Detect Data: SDA is a bidirectional pin used to ...
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... CKE0 WE# CK CK# NOTE: 1. All resistor values are 22 unless otherwise specified. 2. Per industry standard, Micron utilizes various component speed grades as referenced in the Module Part Numbering Guide at www.micron.com/numberguide. pdf: 09005aef80f6b913, source: 09005aef80f6b41c DDAF18C64_128x72G.fm - Rev. C 9/04 EN 512MB, 1GB (x72, ECC, SR) PC3200 V SS RS0# DQS9 ...
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... CK CK# NOTE: 1. All resistor values are 22 unless otherwise specified. 2. Per industry standard, Micron utilizes various component speed grades as referenced in the Module Part Numbering Guide at www.micron.com/numberguide. pdf: 09005aef80f6b913, source: 09005aef80f6b41c DDAF18C64_128x72G.fm - Rev. C 9/04 EN 512MB, 1GB (x72, ECC, SR) PC3200 184-PIN DDR SDRAM RDIMM ...
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... I/O pins. A single read or write access for the DDR SDRAM module effec- tively consists of a single 2n-bit wide, one-clock-cycle data transfer at the internal DRAM core and two corre- sponding n-bit wide, one-half-clock-cycle data trans- fers at the I/O pins ...
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Vio- lating either of these requirements will result in unspecified operation. Mode register bits A0–A2 specify the burst length, A3 specifies the type of burst (sequential or inter- leaved), A4–A6 specify the CAS latency, ...
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Table 6: Burst Definition Table ORDER OF ACCESSES WITHIN STARTING BURST COLUMN TYPE = LENGTH ADDRESS SEQUENTIAL 0 0-1-2 1-2-3 2-3-0 3-0-1 ...
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A8 set to one, and bits A0–A6 set to the desired values. Although not required by the Micron device, JEDEC specifications recommend when a LOAD MODE REGISTER command is issued to reset the DLL, it should always ...
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Commands Table 8, Commands Truth Table, and Table 9, DM Operation Truth Table, provide a general reference of available commands. For a more detailed description Table 8: Commands Truth Table CKE is HIGH for all commands shown except SELF REFRESH; ...
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Absolute Maximum Ratings Stresses greater than those listed may cause perma- nent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the opera- ...
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Table 11: IDD Specifications and Conditions – 512MB DDR SDRAM components only Notes: 1–5, 8, 10, 12, 48; notes appear on pages 18–20; 0°C PARAMETER/CONDITION OPERATING CURRENT: One device bank; Active-Precharge (MIN); DQ, DM and ...
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Table 12: IDD Specifications and Conditions – 1GB DDR SDRAM components only Notes: 1–5, 8, 10, 12, 48; notes appear on pages 18–20; 0°C PARAMETER/CONDITION OPERATING CURRENT: One device bank; Active-Precharge (MIN (MIN); DQ, DM ...
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Table 13: Capacitance Note: 11; notes appear on pages 18–20 PARAMETER Input/Output Capacitance: DQ, DQS Input Capacitance: Command and Address, S#, CKE Input Capacitance: CK, CK# Table 14: DDR SDRAM Component Electrical Characteristics and Recommended AC Operating Conditions Notes: 1–5, ...
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Table 14: DDR SDRAM Component Electrical Characteristics and Recommended AC Operating Conditions (Continued) Notes: 1–5, 12-15, 29; notes appear on pages 18–20; 0°C AC CHARACTERISTICS PARAMETER ACTIVE to READ or WRITE delay PRECHARGE command period DQS read preamble DQS read ...
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Notes 1. All voltages referenced Tests for AC timing and electrical AC and DC DD characteristics may be conducted at nominal ref- erence/supply voltage levels, but the related spec- ifications and device operation are ...
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DRAM controller greater than eight refresh cycles is not allowed. 22. The valid data window is derived by achieving t t other specifications CK/2 QHS). The data valid window ...
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... DLL is required to be reset. This is followed by 200 clock cycles (before READ commands). possible through the module pin, not what each memory device contributes. defined as a steady state logic high or logic low. Micron Technology, Inc., reserves the right to change products or specifications without notice. ...
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Initialization To ensure device operation the DRAM must be ini- tialized as described below: 1. Simultaneously apply power Apply V and then V power. REF TT 3. Assert and hold CKE at a LVCMOS logic low. 4. ...
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... The timing and switching specifications for the PLL listed above are critical for proper operation of DDR SDRAM Regis- tered DIMMs. These are meant subset of the parameters for the specific device used on the module. Detailed information for this PLL is available in JEDEC Standard JESD82. ...
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... The timing and switching specifications for the register listed above are critical for proper operation of DDR SDRAM Registered DIMMs. These are meant subset of the parameters for the specific device used on the module. Detailed information for this register is available in JEDEC Standard JESD82. ...
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... NOTE: 1. Micron Technology, Inc. recommends a minimum air flow of 1 meter/second (~197 LFM) across all modules. 2. The component case temperature measurements shown above were obtained experimentally. The typical system to be used for experimental purposes is a dual-processor 600 MHz work station, fully loaded, with four comparable registered memory modules ...
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SPD Clock and Data Conventions Data states on the SDA line can change only during SCL LOW. SDA state changes during SCL HIGH are reserved for indicating start and stop conditions (as shown in Figure 12, Data Validity, and Figure ...
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Table 17: EEPROM Device Select Code The most significant bit (b7) is sent first SELECT CODE Memory Area Select Code (two arrays) Protection Register Select Code Table 18: EEPROM Operating Modes MODE RW BIT Current Address Read Random Address Read ...
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Table 19: Serial Presence-Detect EEPROM DC Operating Conditions All voltages referenced DDSPD PARAMETER/CONDITION SUPPLY VOLTAGE INPUT HIGH VOLTAGE: Logic 1; All inputs INPUT LOW VOLTAGE: Logic 0; All inputs OUTPUT LOW VOLTAGE 3mA ...
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... Total Number of Bytes In SPD Device 2 Fundamental Memory Type 3 Number of Row Addresses on Assembly 4 Number of Column Addresses on Assembly 5 Number of Physical Ranks on DIMM 6 Module Data Width 7 Module Data Width (Continued) 8 Module Voltage Interface Levels t 9 SDRAM Cycle Time, ( CK) CAS Latency = 3 10 SDRAM Access From Clock ( 11 Module Configuration Type 12 ...
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... DIMM Height 48-61 Reserved 62 SPD Revision 63 Checksum for Bytes 0-62 64 Manufacturer’s JEDEC ID Code 65-71 Manufacturer’s JEDEC IDCode 72 Manufacturing Location 73-90 Module Part Number (ASCII) 91 PCB Identification Code 92 Identification Code (Continued) 93 Year of Manufacture in BCD 94 Week of Manufacture in BCD 95-98 Module Serial Number 99-127 Manufacturer-Specific Data (RSVD) pdf: 09005aef80f6b913, source: 09005aef80f6b41c DDAF18C64_128x72G ...
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Figure 16: 184-Pin DIMM Dimensions – Low-Profile PCB 0.079 (2.00) R (4X 0.098 (2.50) D (2X) 0.091 (2.30) TYP. PIN 1 0.050 (1.27) TYP. 0.091 (2.30) TYP. U15 U16 U17 PIN 184 Figure 17: 184-Pin DIMM Dimensions ...
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Data Sheet Designation Released (No Mark): This data sheet contains mini- mum and maximum limits specified over the complete power supply and temperature range for production 8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900 E-mail: prodmktg@micron.com, ...