mt18lsdt6472ag-133 Micron Semiconductor Products, mt18lsdt6472ag-133 Datasheet

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mt18lsdt6472ag-133

Manufacturer Part Number
mt18lsdt6472ag-133
Description
256mb X72, Ecc, Sr , 512mb X72, Ecc, Dr 168-pin Sdram Udimm
Manufacturer
Micron Semiconductor Products
Datasheet
SYNCHRONOUS
DRAM MODULE
Features
• PC100- and PC133-compliant
• 168-pin, dual in-line memory module (DIMM)
• Unbuffered, ECC-optimized pinout
• 256MB (32 Meg x 72) and 512MB (64 Meg x 72)
• Single +3.3V power supply
• Fully synchronous; all signals registered on positive
• Internal pipelined operation; column address can
• Internal SDRAM banks for hiding row access/precharge
• Programmable burst lengths: 1, 2, 4, 8, or full page
• Auto Precharge, includes Concurrent Auto
• Self Refresh Mode
• 64ms, 8,192-cycle refresh
• LVTTL-compatible inputs and outputs
• Serial Presence-Detect (SPD)
• Gold edge contacts
Table 1:
CL = CAS (READ) latency
Table 2:
09005aef807b3709
SD9_18C32_64X72AG.fm - Rev. E 11/04 EN
MODULE
MARKING
Refresh Count
Device Banks
Device Configuration
Row Addressing
Column Addressing
Module Ranks
edge of system clock
be changed every clock cycle
Precharge, and Auto Refresh Modes
-13E
-133
-10E
FREQUENCY
133 MHz
133 MHz
100 MHz
CLOCK
PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE.
Timing Parameters
Address Table
CL = 2
ACCESS TIME
5.4ns
9ns
CL = 3
5.4ns
7.5ns
SETUP
TIME
256MB (x72, ECC, SR), 512MB (x72, ECC, DR)
2ns
1.5
1.5
HOLD
TIME
1ns
0.8
0.8
256Mb (32 Meg x 8)
4 (BA0, BA1)
8K (A0–A12)
1 (S0#, S2#)
1K (A0–A9)
256MB
1
8K
NOTE:
MT9LSDT3272(L)A(I) – 256MB
MT18LSDT6472(L)A(I) – 512MB
For the latest data sheet, please refer to the Micron
site:
Options
• Operating Temperature Range
• Package
• Frequency/CAS Latency
• PCB
Standard 1.375in./34.93mm
Low Profile 1.125in./28.58mm
Commercial (0°C to +65°C)
Industrial (-40°C to +85°C)
168-pin DIMM (Standard)
168-pin DIMM (Lead-free)
7.5ns (133 MHz)/CL = 2
7.5ns (133 MHz)/CL = 3
10ns (100 MHz)/CL = 2
Standard (1.375in./34.93mm)
Low-Profile (1.125in./28.58mm) See note on page 2
Figure 1: 168-Pin DIMM (MO–161)
www.micron.com/products/modules
1. Consult Micron for product availability; Indus-
trial Temperature Option available in -133 speed
only.
168-PIN SDRAM UDIMM
256Mb (32 Meg x 8)
2 (S0 #, S2#; S1#, S3#)
4 (BA0, BA1)
8K (A0–A12)
1K (A0–A9)
512MB
8K
See note on page 2
©2004 Micron Technology, Inc.
Marking
None
-13E
-10E
-133
Y
I
G
1
1
Web

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mt18lsdt6472ag-133 Summary of contents

Page 1

... SYNCHRONOUS DRAM MODULE Features • PC100- and PC133-compliant • 168-pin, dual in-line memory module (DIMM) • Unbuffered, ECC-optimized pinout • 256MB (32 Meg x 72) and 512MB (64 Meg x 72) • Single +3.3V power supply • Fully synchronous; all signals registered on positive edge of system clock • ...

Page 2

... Designators for component and PCB revision are the last two characters of each part number Consult factory for current revision codes. Example: MT9LSDT3272AG-133B1. 09005aef807b3709 SD9_18C32_64X72AG.fm - Rev. E 11/04 EN 256MB (x72, ECC, SR), 512MB (x72, ECC, DR) MODULE DENSITY CONFIGURATION 256MB 32 Meg x 72 256MB 32 Meg x 72 ...

Page 3

Table 4: Pin Assignment (168-Pin DIMM Front) PIN SYMBOL PIN SYMBOL PIN SYMBOL PIN SYMBOL CB1 DQ0 DQ1 DQ2 DQ3 26 ...

Page 4

... The address inputs also provide the op-code during a MODE REGISTER SET command. SCL Input Serial Clock for Presence-Detect: SCL is used to synchronize the presence-detect data transfer to and from the module. SA0–SA2 Input Presence-Detect Address Inputs: These pins are used to configure the presence-detect device. ...

Page 5

... ECC, SR), 512MB (x72, ECC, DR) SYMBOL TYPE DESCRIPTION V Supply Power Supply: +3.3V ±0.3V Supply Ground – Not Connected: These pins are not connected on these module. Micron Technology, Inc., reserves the right to change products or specifications without notice. 5 168-PIN SDRAM UDIMM ©2004 Micron Technology, Inc. ...

Page 6

... CKE0 WE# A0-A12 BA0 BA1 Note: 1. All resistor values are 10 unless otherwise specified. 2. Per industry standard, Micron modules use various component speed grades as referenced in the module part numbering guide at support/numbering.html. 09005aef807b3709 SD9_18C32_64X72AG.fm - Rev. E 11/04 EN 256MB (x72, ECC, SR), 512MB (x72, ECC, DR) DQMB0 DQMB4 ...

Page 7

... BA0 BA1 Note: 1. All resistor values are 10 unless otherwise specified. 2. Per industry standard, Micron modules use various component speed grades as referenced in the module part numbering guide at support/numbering.html. 09005aef807b3709 SD9_18C32_64X72AG.fm - Rev. E 11/04 EN 256MB (x72, ECC, SR), 512MB (x72, ECC, DR) S1# DQMB4 ...

Page 8

... SD9_18C32_64X72AG.fm - Rev. E 11/04 EN 256MB (x72, ECC, SR), 512MB (x72, ECC, DR) contains 256 bytes. The first 128 bytes can be pro- grammed by Micron to identify the module type and various SDRAM organizations and timing parameters. The remaining 128 bytes of storage are available for use by the customer. System READ/WRITE operations ...

Page 9

M10 and M11 are reserved for future use. Address A12 (M12) is undefined but should be driven LOW during loading of the mode register. The mode register must be loaded when all device banks are idle, and ...

Page 10

Table 7: Burst Definition Table STARTING BURST COLUMN ORDER OF ACCESSES WITHIN LENGTH ADDRESS TYPE = SEQUENTIAL 0 0-1-2 1-2-3 2-3-0 3-0-1 ...

Page 11

Test modes and reserved states should not be used because unknown operation or incompatibility with future versions may result. Write Burst Mode When the burst length programmed via M0- M2 applies to both READ and WRITE bursts; ...

Page 12

Commands The Truth Table, below, provides a quick reference of available commands. This is followed by written description of each command. For a more detailed Table 9: SDRAM Commands and DQMB Operation Truth Table CKE is HIGH for all commands ...

Page 13

Absolute Maximum Ratings Stresses greater than those listed may cause perma- nent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the opera- ...

Page 14

... CKE = HIGH; CS# = HIGH SELF REFRESH CURRENT: CKE 0.2V NOTE Value calculated as one module rank in this condition, and all other module ranks in Power-Down Mode ( Value calculated reflects all module ranks in this condition. 09005aef807b3709 SD9_18C32_64X72AG.fm - Rev. E 11/04 EN 256MB (x72, ECC, SR), 512MB (x72, ECC, DR +3.3V ± ...

Page 15

Table 14: Capacitance – 256MB . Note 2; notes appear on page 18 PARAMETER Input Capacitance: Address and Command Input Capacitance: CK0 Input Capacitance: CK2 Input Capacitance: S0# Input Capacitance: S2# Input Capacitance: CKE Input Capacitance: DQMB0, 2– ...

Page 16

... Table 16: Electrical Characteristics and Recommended AC Operating Conditions Notes 11, 31; notes appear on page 18 Module AC timing parameters comply with PC100 and PC133 Design Specs, based on component parameters ACCHARACTERISTICS PARAMETER Access timefrom CLK (pos.edge) CL= 3 CL= 2 Address hold time Address setup time ...

Page 17

Table 17: AC Functional Characteristics Notes 11, 31; notes appear on page 18 PARAMETER READ/WRITE command to READ/WRITE command CKE to clock disable or power-down entry mode CKE to clock enable or power-down exit setup ...

Page 18

... RAS used in -13E speed grade mod ules is calculated from possible through the module pin, not what each memory device contributes. Micron Technology, Inc., reserves the right to change products or specifications without notice. t RP; clock( for a pulse under- IL ...

Page 19

SPD Clock and Data Conventions Data states on the SDA line can change only during SCL LOW. SDA state changes during SCL HIGH are reserved for indicating start and stop conditions (as shown in Figure 7, Data Validity, and Figure ...

Page 20

Table 18: EEPROM Device Select Code The most significant bit (b7) is sent first Memory Area Select Code (two arrays) Protection Register Select Code Table 19: EEPROM Operating Modes MODE RW BIT Current Address Read RandomAddressRead Sequential Read Byte Write ...

Page 21

Table 20: Serial Presence-Detect EEPROM DC Operating Conditions All voltages referenced DDSPD PARAMETER/CONDITION SUPPLY VOLTAGE INPUT HIGH VOLTAGE: Logic 1; All inputs INPUT LOW VOLTAGE: Logic 0; All inputs OUTPUT LOW VOLTAGE 3mA ...

Page 22

... Memory Type 3 Number of Row Addresses 4 Number of Column Addresses 5 Number of Module Ranks 6 Module Data Width 7 Module Data Width (Continued) 8 Module Voltage Interface Levels 9 t SDRAM Cycle Time, CK (CAS Latency = 3) 10 SDRAM Access From CLK, (CAS Latency = 3) 11 Module Configuration Type 12 Refresh Rate/Type ...

Page 23

... Module Serial Number 99-125 Manufacturer-Specific Data (RSVD) 126 System Frequency 127 SDRAM Component & Clock Detail NOTE The value of RAS used for -13E modules is calculated from 09005aef807b3709 SD9_18C32_64X72AG.fm - Rev. E 11/04 EN 256MB (x72, ECC, SR), 512MB (x72, ECC, DR) = +3.3V ±0.3V DD ENTRY (VERSION) 256MB ...

Page 24

Figure 11: 168-Pin DIMM Dimensions – 256MB U1 U2 0.079 (2.00) R (2X) 0.118 (3.00) (2X) 0.118 (3.00) TYP 0.250 (6.35) TYP 0.118 (3.00) TYP 2.625 (66.68) PIN 1 (PIN 85 ON BACKSIDE) 0.079 (2.00) R (2X 0.118 ...

Page 25

Figure 12: 168-Pin DIMM Dimensions – 512MB U1 0.079 (2.00) R (2X) 0.118 (3.00) (2X) 0.118 (3.00) TYP 0.118 (3.00) TYP PIN 1 U11 PIN 168 0.079 (2.00) R (2X 0.118 (3.00) (2X) 0.118 (3.00) TYP 0.118 (3.00) ...

Page 26

Data Sheet Designation Released (No Mark): This data sheet contains mini- mum and maximum limits specified over the complete power supply and temperature range for production 8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900 E-mail: prodmktg@micron.com, ...

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