mt18jsf25672az Micron Semiconductor Products, mt18jsf25672az Datasheet
mt18jsf25672az
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mt18jsf25672az Summary of contents
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... DDR3 SDRAM UDIMM MT18JSF25672AZ – 2GB MT18JSF51272AZ – 4GB Features • DDR3 functionality and operations supported as de- fined in the component data sheet • 240-pin, unbuffered dual in-line memory module (UDIMM) • Fast data transfer rates: PC3-12800, PC3-10600, PC3-8500, or PC3-6400 • 2GB (256 Meg x 72), 4GB (512 Meg x 72) • ...
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... The data sheet for the base device can be found on Micron’s Web site. Notes: 2. All part numbers end with a two-place code (not shown) that designates component and PCB revisions. Con- sult factory for current revision codes. Example: MT18JSF25672AZ-1G1D1. PDF: 09005aef83606b46 jsf18c256_512x72az.pdf – Rev. B 5/09 ...
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Pin Assignments and Descriptions Table 5: Pin Assignments 240-Pin DDR3 UDIMM Front Pin Symbol Pin Symbol Pin Symbol Pin 1 VrefDQ 31 DQ25 61 2 Vss 32 Vss 62 3 DQ0 33 DQS3 DQ1 34 DQS3 64 5 ...
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... Data strobe: DQS and DQS# are differential data strobes. Output with read data. Edge- aligned with read data. Input with write data. Center-aligned with write data. Serial data: SDA is a bidirectional pin used to transfer addresses and data into and out of the temperature sensor/SPD EEPROM on the module on the I 4 Pin Assignments and Descriptions 2 C bus ...
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... Reference voltage: Control, command, and address (Vdd/2). Reference voltage: DQ, DM (Vdd/2). Ground. Termination voltage: Used for control, command, and address (Vdd/2). No connect: These pins are not connected on the module. Not usable: No connections allowed. 5 Pin Assignments and Descriptions Micron Technology, Inc. reserves the right to change products or specifications without notice. ...
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... DQ Map Table 7: Component-to-Module DQ Map Component Reference Component Number DQ Module PDF: 09005aef83606b46 jsf18c256_512x72az.pdf – Rev. B 5/09 2GB, 4GB (x72, ECC, DR) 240-Pin DDR3 SDRAM UDIMM ...
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... Table 7: Component-to-Module DQ Map (Continued) Component Reference Component Number DQ Module DQ U12 U14 U16 U18 PDF: 09005aef83606b46 jsf18c256_512x72az.pdf – Rev. B 5/09 2GB, 4GB (x72, ECC, DR) 240-Pin DDR3 SDRAM UDIMM ...
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Functional Block Diagram Figure 2: Functional Block Diagram S1# S0# DQS0 DQS0# DM0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 Vss DQS1 DQS1# DM1 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 Vss DQS2 DQS2# DM2 DQ16 DQ17 DQ18 ...
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... DRAM core and eight corresponding n-bit-wide, one-half-clock-cycle data trans- fers at the I/O pins. DDR3 modules use two sets of differential signals: DQS, DQS# to capture data and CK and CK# to capture commands, addresses, and control signals. Differential clocks and data strobes ensure exceptional noise immunity for these signals and provide precise crossing points to capture input signals ...
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... Electrical Specifications Stresses greater than those listed may cause permanent damage to the module. This is a stress rating only, and functional operation of the module at these or any other condi- tions outside those indicated in each device’s data sheet is not implied. Exposure to absolute maximum rating conditions for extended periods may adversely affect reliability. ...
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... Component specifications are available on Micron’s Web site. Module speed grades cor- relate with component speed grades, as shown below. Table 10: Module and Component Speed Grades DDR3 components may exceed the listed module speed grades; module may not be available in all listed speed grades Module Speed Grade -1G6 ...
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... Self refresh temperature current: MAX T Self refresh temperature current (SRT-enabled): MAX T All banks interleaved read current Reset current 1. One module rank in the active Idd; the other rank in Idd2P (slow exit). Notes: 2. All ranks in this Idd condition. PDF: 09005aef83606b46 jsf18c256_512x72az.pdf – Rev. B 5/09 ...
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... Self refresh temperature current: MAX T Self refresh temperature current (SRT-enabled): MAX T All banks interleaved read current Reset current 1. One module rank in the active Idd; the other rank in Idd2P (slow exit). Notes: 2. All ranks in this Idd condition. PDF: 09005aef83606b46 jsf18c256_512x72az.pdf – Rev. B 5/09 2GB, 4GB (x72, ECC, DR) 240-Pin DDR3 SDRAM UDIMM = 85° ...
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... TSE2002av, Serial Presence Detect with Temperature Sensor.” Serial Presence-Detect EEPROM Operation DDR3 SDRAM modules incorporate serial presence-detect. The SPD data is stored in a 256-byte EEPROM. The first 128 bytes are programmed by Micron to comply with JE- DEC standard JC-45, “Appendix X: Serial Presence Detect (SPD) for DDR3 SDRAM Modules.” ...
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Table 14: Sensor and EEPROM Serial Interface Timing (Continued) Parameter/Condition SCL clock frequency Data setup time Start condition setup time Stop condition setup time EVENT# Pin The temperature sensor also adds the EVENT# pin (open drain). Not used by the ...
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Figure 3: EVENT# Pin Functionality Critical Alarm window (MAX) Alarm window (MIN) EVENT# interrupt mode EVENT# comparator mode EVENT# critical temperature only mode Table 15: Temperature Sensor Registers Name Pointer register Capability register Configuration register Alarm temperature upper boundary register ...
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Table 16: Pointer Register Bits 0– Table 17: Pointer Register Bits 0–2 Descriptions Capability Register The capability register indicates the features and functionality supported by the temper- ature sensor. ...
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Table 19: Capability Register Bit Description (Continued) Bit Description 2 Wider range 0: Temperatures lower than 0°C are clamped to a binary value Temperatures below 0°C can be read 4:3 Temperature resolution 00: 0.5°C LSB 01: 0.25°C ...
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Table 21: Configuration Register Bit Descriptions (Continued) Bit Description 4 Event status 0: EVENT# has not been asserted by this device 1: EVENT# is being asserted due to an alarm window or critical temperature condition 5 Clear event 0: No ...
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Figure 4: Hysteresis Applied to Temperature Around Trip Points Below window bit Above window bit 1. T Notes Hyst is the value set in the hysteresis bits of the configuration register. Table 22: Hysteresis Applied to Alarm ...
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Temperature Trip Point Registers The upper and lower temperature boundary registers are used to set the maximum and minimum values of the alarm window. LSB for these registers is 0.25°C. All RFU bits in the register will always report zero. ...
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Table 26: Temperature Register (Address: 0x05 Above Above Below MSB critical alarm alarm trip window window Table 27: Temperature Register Bit Descriptions Bit Description 13 Below alarm window 0: Temperature is equal to or above the lower ...
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... U10 0.76 (0.030) R 1.0 (0.039) TYP 123.0 (4.84) TYP Back view U14 U15 U16 U17 5.0 (0.197) TYP 71.0 (2.79) TYP times occur. 23 Module Dimensions U8 U9 23.3 (0.92) TYP 17.3 (0.68) TYP 9.5 (0.374) 0.80 (0.031) TYP TYP Pin 120 1.0 (0.039) R (8X) 3.1 (0.122) 2X TYP U18 U19 3.0 (0.118) 4X TYP Pin 121 47.0 (1.85) TYP Micron Technology, Inc. reserves the right to change products or specifications without notice. © ...