mt18jbf25672pd Micron Semiconductor Products, mt18jbf25672pd Datasheet

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mt18jbf25672pd

Manufacturer Part Number
mt18jbf25672pd
Description
2gb X72, Ecc, Dr 240-pin Ddr3 Sdram Vlp Rdimm
Manufacturer
Micron Semiconductor Products
Datasheet
DDR3 SDRAM VLP RDIMM
MT18JBF25672PD – 2GB
MT18JBZF25672PD – 2GB
For component data sheets, refer to Micron’s Web site:
Features
• DDR3 functionality and operations supported as
• 240-pin, very low profile registered dual in-line
• Compatible with ATCA form factors
• Fast data transfer rates: PC3-10600, PC3-8500,
• 2GB (256 Meg x 72)
• V
• V
• Supports ECC error detection and correction
• Nominal and dynamic on-die termination (ODT) for
• Dual rank
• On-board I
• 8 internal device banks
• Fixed burst chop (BC) of 4 and burst length (BL) of 8
• Selectable BC4 or BL8 on-the-fly (OTF)
• Gold edge contacts
• Pb-free
• Fly-by topology
• Terminated control, command, and address bus
Table 1:
PDF: 09005aef83244dba/Source:09005aef83244e3a
JBF18C256x72PDY.fm - Rev. B 6/08 EN
Speed
Grade
defined in the component data sheet
memory module (VLP RDIMM)
or PC3-6400
data, strobe, and mask signals
serial presence-detect (SPD) EEPROM
via the mode register set (MRS)
-1G5
-1G4
-1G3
-1G1
-1G0
-80C
-80B
DD
DDSPD
= 1.5V ±0.075V
= +3.0V to +3.6V
Nomenclature
PC3-10600
PC3-10600
PC3-10600
2
Key Timing Parameters
Industry
PC3-8500
PC3-8500
PC3-6400
PC3-6400
C temperature sensor with integrated
Products and specifications discussed herein are subject to change by Micron without notice.
CL = 10
1333
1333
1333
CL = 9
1333
1333
2GB (x72, ECC, DR) 240-Pin DDR3 SDRAM VLP RDIMM
Data Rate (MT/s)
CL = 8
1333
1066
1066
1066
1066
www.micron.com
1
CL = 7
1066
1066
1066
Figure 1:
Notes: 1. Contact Micron for industrial temperature
Options
• Full module heat spreader
• Operating temperature
• Package
• Frequency/CAS latency
PCB height: 17.9mm (0.705in)
– Commercial (0°C ≤ T
– Industrial (–40°C ≤ T
– 240-pin DIMM
– 1.5ns @ CL = 8 (DDR3-1333)
– 1.5ns @ CL = 9 (DDR3-1333)
– 1.5ns @ CL = 10 (DDR3-1333)
– 1.87ns @ CL = 7 (DDR3-1066)
– 1.87ns @ CL = 8 (DDR3-1066)
– 2.5ns @ CL = 5 (DDR3-800)
– 2.5ns @ CL = 6 (DDR3-800)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2. Not recommended for new designs.
CL = 6
800
800
800
800
800
800
800
module offerings.
240-Pin VLP RDIMM
(ATCA Compatible R/C L)
CL = 5
800
800
A
A
1
≤ +85°C)
≤ +70°C)
13.125
t
(ns)
13.5
12.5
RCD
©2008 Micron Technology, Inc. All rights reserved.
12
15
15
15
2
2
2
2
2
13.125
13.5
12.5
(ns)
t
12
15
15
15
RP
Marking
Features
None
-1G5
-1G4
-1G3
-1G1
-1G0
-80C
-80B
Z
Y
I
50.625
(ns)
49.5
52.5
52.5
t
48
51
50
RC

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mt18jbf25672pd Summary of contents

Page 1

... DDR3 SDRAM VLP RDIMM MT18JBF25672PD – 2GB MT18JBZF25672PD – 2GB For component data sheets, refer to Micron’s Web site: Features • DDR3 functionality and operations supported as defined in the component data sheet • 240-pin, very low profile registered dual in-line memory module (VLP RDIMM) • ...

Page 2

... The data sheet for the base device can be found on Micron’s Web site. 2. All part numbers end with a two-place code (not shown) that designates component and PCB revisions. Consult factory for current revision codes. Example: MT18JBF25672PDY-1G1D1. PDF: 09005aef83244dba/Source:09005aef83244e3a JBF18C256x72PDY.fm - Rev. B 6/08 EN ...

Page 3

Pin Assignments and Descriptions Table 5: Pin Assignments 240-Pin DDR3 VLP RDIMM Front Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol DQ25 61 REF ...

Page 4

... Input with write data. Center-aligned with write data. SDA I/O Serial data: SDA is a bidirectional pin used to transfer addresses and data into and out of the temperature sensor/SPD EEPROM on the module on the I PDF: 09005aef83244dba/Source:09005aef83244e3a JBF18C256x72PDY.fm - Rev. B 6/08 EN 2GB (x72, ECC, DR) 240-Pin DDR3 SDRAM VLP RDIMM Pin Assignments and Descriptions A[13:0] address the 1Gb DDR3 devices ...

Page 5

... Termination voltage: Used for control, command, and address ( – No connect: These pins are not connected on the module. NF – No function: Connected within the module, but provides no functionality. PDF: 09005aef83244dba/Source:09005aef83244e3a JBF18C256x72PDY.fm - Rev. B 6/08 EN 2GB (x72, ECC, DR) 240-Pin DDR3 SDRAM VLP RDIMM Pin Assignments and Descriptions . DD /2) ...

Page 6

Functional Block Diagram Figure 2: Functional Block Diagram RS1# RS0# DQS0 DQS0# DM0/DQS9 NF/TDQS9# DM/ RDQS DQ DQ0 DQ DQ1 DQ2 DQ DQ DQ3 DQ DQ4 DQ5 DQ DQ DQ6 DQ DQ7 DQS1 DQS1# DM1/DQS10 NF/TDQS10# DM/ ...

Page 7

... General Description The MT18JBF25672PD and MT18JBZF25672PD DDR3 SDRAM modules area high- speed, CMOS dynamic random access 2GB memory modules organized in a x72 config- uration. These DDR3 SDRAM module uses internally configured, 8-bank 1Gb DDR3 SDRAM devices. DDR3 SDRAM modules use double data rate architecture to achieve high-speed opera- tion ...

Page 8

... Platform Memory Module Thermal Sensor Component Specification.” Serial Presence-Detect EEPROM Operation DDR3 SDRAM modules incorporate serial presence-detect. The SPD data is stored in a 256-byte EEPROM. The first 128 bytes are programmed by Micron to comply with JEDEC Standard JC-45 “Appendix X: Serial Presence-Detect (SPD) for DDR3 SDRAM Modules” ...

Page 9

... Electrical Specifications Stresses greater than those listed in Table 7 may cause permanent damage to the module. This is a stress rating only, and functional operation of the module at these or any other conditions outside those indicated in each device’s data sheet is not implied. Exposure to absolute maximum rating conditions for extended periods may adversely affect reliability ...

Page 10

... Micron encourages designers to simulate the signal characteristics of the system’s memory bus to ensure adequate signal integrity of the entire memory system. Power Operating voltages are specified at the DRAM, not at the edge connector of the module. Designers must account for any system voltage drops at anticipated power levels to ensure the required supply voltage is maintained. ...

Page 11

... Refresh current Self refresh temperature current: MAX T Self refresh temperature current (SRT-enabled): MAX T All banks interleaved read current Notes: 1. One module rank in the active I 2. All ranks in this I PDF: 09005aef83244dba/Source:09005aef83244e3a JBF18C256x72PDY.fm - Rev. B 6/08 EN 2GB (x72, ECC, DR) 240-Pin DDR3 SDRAM VLP RDIMM = 85° ...

Page 12

... Notes: 1. Timing and switching specifications for the register listed above are critical for proper oper- ation of the DDR3 SDRAM RDIMMs. These are meant subset of the parameters for the specific device used on the module. PDF: 09005aef83244dba/Source:09005aef83244e3a JBF18C256x72PDY.fm - Rev. B 6/08 EN 2GB (x72, ECC, DR) 240-Pin DDR3 SDRAM VLP RDIMM ...

Page 13

... Temperature Sensor with Serial Presence-Detect EEPROM The temperature sensor continuously monitors the module’s temperature and can be read back at any time over the I Table 12: Temperature Sensor with Serial Presence-Detect EEPROM Operating Conditions Parameter/Condition Supply voltage Supply current 3.3V DD Input high voltage: Logic 1; SCL, SDA Input low voltage: Logic 0 ...

Page 14

The compare mode is similar to the interrupt mode, except EVENT# cannot be reset by the user and only returns to the logic HIGH state when the temperature falls below the programmed thresholds. Critical temperature mode triggers EVENT# only when ...

Page 15

Table 14: Temperature Sensor Registers Name Pointer register Capability register Configuration register Alarm temperature upper boundary register Alarm temperature lower boundary register Critical temperature register Temperature register Pointer Register The pointer register selects which of the 16-bit registers is being ...

Page 16

Capability Register The capability register indicates the features and functionality supported by the temper- ature sensor. This register is a read-only register. Table 17: Capability Register (Address: 0x00 RFU RFU 7 6 RFU RFU Table 18: Capability Register ...

Page 17

Table 20: Configuration Register Bit Descriptions Bit Description 0 Event mode 0: Comparator mode 1: Interrupt mode 1 EVENT# polarity 0: Active LOW 1: Active HIGH 2 Critical event only 0: EVENT# trips on alarm or critical temperature event 1: ...

Page 18

Figure 4: Hysteresis Below window bit Above window bit Notes the value set in the alarm temperature lower boundary trip register Hyst is the value set in ...

Page 19

Temperature Format The temperature trip point registers and temperature readout register use a “2’s complement” format to enable negative numbers. The least significant bit (LSB) is equal to 0.0625°C or 0.25°C depending on which register is referenced example, ...

Page 20

Temperature Register The temperature register is a read-only register that provides the current temperature detected by the temperature sensor. The LSB for this register is 0.0625°C with a resolu- tion of 0.0625°C. The most significant bit (MSB) is 128°C in ...

Page 21

... TYP 123.0 (4.84) TYP Back view U13 U14 U16 U17 U18 U15 5.0 (0.197) TYP 71.0 (2.79) TYP Module with heat spreader U15 U15 tive owners. Micron Technology, Inc., reserves the right to change products or specifications without notice. 21 Module Dimensions U9 U10 18.0 (0.709) 17.8 (0.701) 9.5 (0.374) ...

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