psd934f2v-20mi STMicroelectronics, psd934f2v-20mi Datasheet - Page 32

• Manufacturer Part Number: psd934f2v-20mi
• Description: Flash In-system Programmable Isp Peripherals For 8-bit Mcus
• Manufacturer: STMicroelectronics

The
PSD9XX
Functional
Blocks
(cont.)
28
PSD9XX Family
Figure 5. Priority Level of Memory and I/O Components
9.1.3.1. Memory Select Configuration for MCUs with Separate Program and Data Spaces
The 8031 and compatible family of microcontrollers, which includes the 80C51, 80C151,
80C251, 80C51XA, and the C500 family have separate address spaces for code memory
(selected using PSEN) and data memory (selected using RD). Any of the memories
within the PSD9XX can reside in either space or both spaces. This is controlled through
manipulation of the VM register that resides in the PSD’s CSIOP space.
The VM register is set using PSDsoft to have an initial value. It can subsequently be
changed by the microcontroller so that memory mapping can be changed on-the-fly.
For example, you may wish to have SRAM and Flash in Data Space at boot, and Boot
Block in Program Space at boot, and later swap Boot Block and Flash. This is easily done
with the VM register by using PSDsoft to configure it for boot up and having the microcon-
troller change it when desired.
Table 13 describes the VM Register.
NOTE: Bits 5-7 are not used, should set to “0”.
Table 13. VM Register
Bit 7*
*
*
Highest Priority
Lowest Priority
Bit 6*
*
*
Bit 5*
*
*
FL_Data Boot_Data
0 = RD
can’t
access
Flash
1 = RD
access
Flash
Bit 4
0 = RD
can’t
access
Secondary
Flash
1 = RD
access
Secondary
Flash
Secondary Flash Memory
Bit 3
Main Flash Memory
SRAM, I/O
Level 1
Level 2
Level 3
0 = PSEN 0 = PSEN
can’t
access
Flash
1 = PSEN 1 = PSEN
access
Flash
FL_Code
Bit 2
Boot_Code SRAM_Code
can’t
access
Secondary
Flash
access
Secondary
Flash
Bit 1
Preliminary Information
0 = PSEN
can’t
access
SRAM
1 = PSEN
access
SRAM
Bit 0