msm5265 Oki Semiconductor, msm5265 Datasheet - Page 7

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msm5265

Manufacturer Part Number
msm5265
Description
80-dot Lcd Driver
Manufacturer
Oki Semiconductor
Datasheet

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FUNCTIONAL DESCRIPTION
Operational Description
Pin Functional Description
• OSC-IN, OSC-OUT, OSC-OUT
The MSM5265 consists of a 160-stage shift register, 160-bit data latch, and 80 pairs of LCD
drivers. The display data is input from the DATA-IN pin to the 160-stage shift register at the
rising edge of the CLOCK pulse and it is shifted to the 160-bit data latch when the LOAD
signal is set at "H" level, then it is directly output from the 80 pairs of LCD drivers to the LCD
panel. Input the display data in the order of SEG80, SEG79, SEG78, ..., SEG2, SEG1.
As shown in the figure below, by connecting the external resistors R
capacitor C
generate the common signal is formed.
This frequency is divided into either 1/8 or 1/4 by the internal dividing circuit. The 1/8
divided frequency is used in the static display mode, while the 1/4 divided frequency is used
as the common signal in the 1/2 duty dynamic display mode which is output from the COM-
OUT pin. (EXT/INT should be set at low level.)
The resistor R
of the R
When the external common signal is used, the EXT/INT pin should be set at high level and
the external common signal should be input from the OSC-IN pin.
Keep the wiring between the OSC-IN pin and R
becomes susceptible to external noise if the value of R
DATA-IN
CLOCK
LOAD
DATA LATCH
Output
(inside the IC)
1
should be more than 10 times that of R
0
with OSC-IN, OSC-OUT and OSC-OUT respectively, an oscillating circuit to
1
is used to limit the current on the OSC-IN pin's protecting diodes. The value
C
1
0
R
R
0
1
OSC-OUT
OSC-OUT
OSC-IN
2
3
V
DD
(MSM5265)
4
1
as short as possible, because the OSC-IN pin
0
.
5
1
is large.
6
f
OSC
R
159
1
=
≥10 R
1/2.2 C
0
0
R
f
OSC
0
160
0
, R
1
and external
MSM5265
7/18

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