zm7100 Power-One, zm7100 Datasheet - Page 12

• Manufacturer Part Number: zm7100
• Description: Zm7100 Series Digital Power Manager
• Manufacturer: Power-One

10.1.1
Figure 6 gives an overview of the different memory sections contained in the Z-One digital IBA system. A write
protection register WP in the DPM limits the write access to the memory blocks in the DPM and the POL
converters. The WP register content is defaulted to write protect upon powering up the DPM.
The write protection can be disabled by checking appropriate boxes in the Write Protections window shown in
Figure 7 or via the I
protections are automatically restored when the DPM input power is recycled.
REV. 4.0 JUL 28, 2006
Write Protection
2
C bus by writing directly into the Write Protection Register WP shown in Figure 8. The write
Byte
Address
PPS
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1)
these bits are cleared when the register is read
Figure 4. POL Programming Status Registers PPS0 and PPS1
ERR
Bit 7
R-0
1)
1)
0 = no error
CRC: CRC error after a memory check
0 = no error
0 = low
0 = low
ERR: Error bit
0 = no error
1 = error occured
FAULT: Fault bit
0 = no error
1 = fault occured
WAR: Warning bit
0 = no error
1 = warning occured
SP: System programmed successfully
0 = not all POLs are programmed
1 = all POLs were programmed successfully
SD: Transmission error on SD interface
1 = error occurred
1 = error occurred
CB: Crow-Bar (CB) output
1 = high
FE: Front-End (FE) output
1 = high
FAULT
R-0
PPS[3]
www.power-one.com
Base
Figure 5. DPM Status Register IMS
...
WAR
R-0
Base+1
PPS[2]
R-0
SP
...
ZM7100 Series Digital Power Manager
R-0
SD
Base+2
PPS[1]
CRC
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
R-0
...
read as ‘0’
R-0
CB
Base+3
PPS[0]
Bit 0
R-1
...
FE
Page 12 of 29
Data Sheet