w49v002a Winbond Electronics Corp America, w49v002a Datasheet - Page 23

• Manufacturer Part Number: w49v002a
• Description: 256k X 8 Cmos Flash Memory With Lpc Interface
• Manufacturer: Winbond Electronics Corp America

Program Cycle Timing Diagram
LAD[3:0]
#LFRAM
#RESET
CLK
LAD[3:0]
LAD[3:0]
LAD[3:0]
#RESET
#LFRAM
All the address loaded should be within the top 4MByte,FFFFFFFF to FFC00000, or within the bottom 1MByte, 000FFFFF to 000E0000.
#RESET
#LFRAM
#LFRAM
#RESET
CLK
CLK
CLK
1 Clock
4th Start
1 Clock
1 Clock
3rd Start
2nd Start
1 Clock
1st Start
0000b
0000b
0000b
0000b
1 Clock
1 Clock
1 Clock
1 Clock
Memory
Write
Cycle
Memory
Write
Cycle
011Xb
011Xb
Memory
Write
Cycle
Memory
Write
Cycle
011Xb
011Xb
A[31:28]
A[31:28]
A[31:28]
A[31:28]
A[27:24]
A[27:24]
A[27:24]
A[27:24]
Write the 4th command(target location to be programmed) to the device in LPC mode.
A[23:20]
A[23:20]
A[23:20]
A[23:20]
Load Address "5555" in 8 Clocks
Load Ain in 8 Clocks
Write the 3rd command to the device in LPC mode.
Load Address "2AAA" in 8 Clocks
Write the 2nd command to the device in LPC mode.
Load Address "5555" in 8 Clocks
Write the 1st command to the device in LPC mode.
Address
A[19:16]
A[19:16]
A[19:16]
A[19:16]
Address
Address
Address
A[15:12]
X101b
X010b
X101b
A[11:8]
0101b
- 23 -
1010b
0101b
A[7:4]
1010b
0101b
0101b
A[3:0]
0101b
1010b
0101b
Preliminary W49V002A
Load Data "AA" in 2 Clocks
Load Din in 2 Clocks
D[3:0]
0000b
Load Data "55"
Load Data "A0"
0101b
in 2 Clocks
in 2 Clocks
1010b
Data
Data
Data
Data
Publication Release Date: April 2001
D[7:4]
1010b
0101b
1010b
1111b
1111b
1111b
1111b
2 Clocks
2 Clocks
2 Clocks
2 Clocks
TAR
TAR
TAR
TAR
Tri-State
Tri-State
Tri-State
Tri-State
1 Clock
1 Clock
1 Clock
0000b
0000b
1 Clock
0000b
Sync
Sync
0000b
Sync
Sync
TAR
TAR
TAR
TAR
Revision A1
Internal
program start
Internal
program start
Start next
command
Start next
command
1 Clock
1 Clock
Start next
command
1 Clock