m28f101-100xp6 STMicroelectronics, m28f101-100xp6 Datasheet - Page 5

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m28f101-100xp6

Manufacturer Part Number
m28f101-100xp6
Description
128k Chip Erase Flash Memory
Manufacturer
STMicroelectronics
Datasheet
Table 6. AC Measurement Conditions
Figure 3. AC Testing Input Output Waveform
Table 7. Capacitance
Note: 1. Sampled only, not 100% test.ed
READ/WRITE MODES (cont’d)
A write to the command register is made by bringing
W Low while E is Low. The falling edge of W latches
Addresses, while the rising edge latches Data,
which are used for those commands that require
address inputs, command input or provide data
output.
The supply voltage V
V
is powered up or when V
of the command register defaults to 00h, thus
automatically setting-up Read operations. In addi-
tion a specific command may be used to set the
command register to 00h for reading the memory.
Input Rise and Fall Times
Input Pulse Voltages
Input and Output Timing Ref. Voltages
PP
SRAM Interface
EPROM Interface
Symbol
0.45V
can be applied in any order. When the device
2.4V
C
C
3V
0V
OUT
IN
Input Capacitance
Output Capacitance
CC
Parameter
(1)
and the program voltage
PP
(T
is
A
= 25 C, f = 1 MHz )
6.5V the contents
1.5V
2.0V
0.8V
AI01275
SRAM Interface Levels
Test Condition
V
V
OUT
0 to 3V
IN
1.5V
10ns
= 0V
Figure 4. AC Testing Load Circuit
= 0V
The system designer may chose to provide a con-
stant high V
all operations, or to switch the V
only when needing to erase or program the mem-
ory. All command register access is inhibited when
V
(V
If the device is deselected during Erasure, Pro-
gramming or Verification it will draw active supply
currents until the operations are terminated.
The device is protected against stress caused by
long erase or program times. If the end of Erase or
Programming operations are not terminated by a
Verify cycle within a maximum time permitted, an
internal stop timer automatically stops the opera-
tion. The device remains in an inactive state, ready
to start a Verify or Reset Mode operation.
CC
LKO
C L = 30pF for SRAM Interface
C L = 100pF for EPROM Interface
C L includes JIG capacitance
falls below the Erase/Write Lockout Voltage
) of 2.5V.
DEVICE
UNDER
TEST
PP
and use the register commands for
Min
1.3V
EPROM Interface Levels
1N914
3.3k
0.45V to 2.4V
0.8V and 2V
C L = 30pF or 100pF
Max
12
6
PP
10ns
from low to high
OUT
M28F101
AI01276
Unit
pF
pF
5/23

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