NJU26126_10 NJRC [New Japan Radio], NJU26126_10 Datasheet - Page 2

• Manufacturer Part Number: NJU26126_10
• Description: Digital Signal Processor
• Manufacturer: NJRC [New Japan Radio]

NJU26126
■
■
SDI0
SDI1
SDI2
- 2 -
Function Block Diagram
DSP Block Diagram
CLKOUT
Capacitors
RESETb
SLAVEb
VREGO
Low -ESR
Required
External
MCK
SDA
SCL
CLK
HPF/LPF executing even if DRC is disabled.
When DRC and XOVER option are only enabled, DRC Mixer can be used.
If you send Filter coefficient, you can use the XOVER frequencies other than the preset frequency.
(However, it is limited to 2000Hz or less.)
・DRCがOFFでもHPF/LPFは動作します。
・DRC MixerおよびDRC(LPF)は、DRCがEnableで、
なおかつXOVER optionがEnableの場合のみ使用可能です。
HPF
LPF
(No Signal Counter)
Signal Level
Detector
Internal Pow er
SW
1.8V level terminal
(1.8V)
I
GENERATOR /
2
C INTERFACE
Built-in LDO
Trimmer
Surround Output
Input
TIMING
PROC Output
EXEC Output
C/SW Output
HPF Output
LPF Output
DRC(HPF)
DRC(LPF)
PLL
The Delay processing position can be exclusively
Selected from either of Input/SDO0/SDO1/SDO2.
Delay処理位置は、Input/SDO0/SDO1/SDO2の
いずれかから排他的に選択可能です。
(22ms)
Delay
SW
SW
SW4 (DRC Xover enable/disable)
SW
NJU26126 Block Diagram
Source Select
SW
Fig. 2 NJU26126 Function Diagram
SDO0/1/2
(10band/9band+HPF)
Fig. 1 NJU26126 Block Diagram
PEQ
DATA RAM
PROGRAM
ADDRESS GENERATION UNIT
CONTROL
HPF Output
LPF Output
24Bit Fixed-point DSP Core
ALU
The Delay processing position can be exclusively
Selected from either of Input/SDO0/SDO1/SDO2.
Delay処理位置は、
Input/SDO0/SDO1/SDO2のいずれかから排他的に選択可能です。
SW5(DRC enable/disable)
SW1
(22ms)
(22ms)
(22ms)
Delay
Delay
Delay
Tone Control
(0.5dB step)
SDO0
SDO1
SDO2
FIRMWARE
24Bit x 24Bit
MULTIPLIER
C/SW Mixer
DRC Mixer
Channel Trimmer
(+24dB~-96dB,mute, 0.25dB step)
ROM
Master Volume
(0dB~-96dB,mute, 0.5dB step)
eala Rebirth
&
eala /
SW
SDO0
SDO1
SDO2
SW
SW2
Bass Boost
Dynamic
eala Rebirth
SERIAL AUDIO
Limiter
Limiter
eala /
INTERFACE
INTERFACE
GPIO
SW3
SW6
SW2
SW7
Generator
(0~-96dB,mute, 0.25dB step)
Surround
Exec Volume
(0~-96dB,mute, 0.5dB step)
L/R trimmer
Signal
SDO0
SDO1
SDO2
Ver.2010-08-19
Surround Output
PROC Output
EXEC Output
C/SW Output
SDO0-2
SDI0-2
PROC
WDC
BCK
AD1
LR