ISL3036E INTERSIL [Intersil Corporation], ISL3036E Datasheet

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ISL3036E

Manufacturer Part Number
ISL3036E
Description
4-Channel And 6-Channel High Speed, Auto-direction Sensing Logic Level Translators
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet

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4-Channel And 6-Channel High Speed,
Auto-direction Sensing Logic Level
Translators
The ISL3034E, ISL3035E, ISL3036E 4- and 6-channel
bi-directional, auto-direction sensing, level translators
provide the required level shifting in multi-voltage systems at
data transfer rates up to 100Mbps. The auto-direction
sensing feature makes the ISL3034E, ISL3035E, ISL3036E
ideally suited for memory-card level translation (or for
generic four to six channel level translation) especially if
bit-by-bit direction control is desired. The V
voltages set the logic levels on either side of the device.
Logic signals present on the IC’s V
voltage logic signals on the IC’s V
The ISL3035E features a CLK_RET output that returns the
same clock signal applied to the CLK_V
timing that mimics the data returning from the I/OV
The ISL3034E, ISL3035E, ISL3036E operate at full speed
with external input drivers that source as little as 4mA output
current. Each I/O channel is pulled up to V
internal 30µA current source, allowing the ISL3034E,
ISL3035E, ISL3036E to be driven by either push-pull or
open-drain drivers.
The ISL3034E and ISL3036E include an enable (EN) input
that when driven low places the IC into a low-power
shutdown mode, with all I/O lines tri-stated. All versions
feature an automatic shutdown mode, that places the part in
the same shutdown state when V
states of I/OV
selecting the appropriate product (see Table 1).
The ISL3034E, ISL3035E, ISL3036E operate with V
voltages from +2.2V to +3.6V and V
to +3.2V, making them ideal for data transfer between
low-voltage microcontrollers or ASICs and higher voltage
components.
NUMBER
ISL3034E
ISL3035E
ISL3036E
PART
(Mbps)
DATA
RATE
100
100
100
CC
TABLE 1. SUMMARY OF FEATURES
and I/OV
CHANNELS
NUMBER
OF
6
6
4
L
®
during shutdown are chosen by
1
PIN?
YES
YES
NO
EN
CC
CC
L
L
Data Sheet
side appear as higher
is less than V
side and vice versa.
voltages from +1.35V
I/OV
75kΩ to V
L
16.5kΩ
16.5kΩ
STATE
input, but with
to V
to V
CC
CC
L
SHDN
L
L
and V
or V
L
L
CC
L
. The
L
by an
Impedance
CC
supply
I/OV
16.5kΩ
16.5kΩ
STATE
to V
to V
inputs.
SHDN
1-888-INTERSIL or 1-888-468-3774
High
CC
CC
CC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• Best-In-Class ESD Protection: ±15kV IEC61000-4-2 ESD
• 100Mbps Guaranteed Data Rate
• Four (ISL3036) or Six (ISL3034, ISL3035) Bi-directional
• Auto-direction Sensing Eliminates Direction Control Logic
• Enable Input (ISL3034E, ISL3036E) for Logic Control of
• Clock Return Output (ISL3035E)
• Compatible with 4mA Input Drivers or Larger
• +1.35V ≤ V
• Pb-Free (RoHS Compliant)
• 16Ld µTQFN (2.6mmx1.8mm), 16 Ld TQFN (3mmx3mm),
Applications
• Simplifies the Interface Between Two Logic ICs Operating
• SD Card and MiniSD Card Level Translation
• MMC (Multi Media Card) Level Translation
• Memory Stick Card Level Translation
Typical Operating Circuit
ISL3034E, ISL3035E, ISL3036E
Protection on ALL Input, Output, and I/O Lines
Channels
Pins
Low Power SHDN Mode
Voltage Range
and 14 Ld QFN (3.5mmx3.5mm) Packages
at Different Supply Voltages
CONTROLLER
+1.8V
SYSTEM
+1.8V
CLOCK_IN
March 31, 2009
GND
All other trademarks mentioned are the property of their respective owners.
CLOCK
|
DAT3
DAT2
DAT1
DAT0
CMD
Intersil (and design) is a registered trademark of Intersil Americas Inc.
L
≤ +3.2V and +2.2V ≤ V
Copyright Intersil Americas Inc. 2009. All Rights Reserved
0.1µF
I/OV
I/OV
I/OV
I/OV
I/OV
CLK_V
CLK_RET
V
ISL3035E
L
L
L
L
L
L
GND
L
CLK_V
V
I/OV
I/OV
I/OV
I/OV
I/OV
CC
CC
CC
CC
CC
CC
CC
CC
0.1µF
≤ +3.6V Supply
DAT3
DAT2
DAT1
DAT0
CMD
CLOCK
FN6492.0
SD CARD
1µF
+3.3V
GND
+3.3V

Related parts for ISL3036E

ISL3036E Summary of contents

Page 1

... Protection on ALL Input, Output, and I/O Lines • 100Mbps Guaranteed Data Rate • Four (ISL3036) or Six (ISL3034, ISL3035) Bi-directional Channels • Auto-direction Sensing Eliminates Direction Control Logic Pins • Enable Input (ISL3034E, ISL3036E) for Logic Control of and V supply CC L Low Power SHDN Mode • ...

Page 2

... ISL3034EIRUZ-T (Notes 2, 3) ISL3035EIRTZ (Note 1) ISL3035EIRTZ-T (Notes 1, 3) ISL3035EIRUZ-T (Notes 2, 3) ISL3036EIRZ-T (Notes 1, 3) ISL3036EIRUZ-T (Notes 2, 3) NOTES: 1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD- 020 ...

Page 3

... LD µTQFN) TOP VIEW I/ I/ I/ I/ I/ NOTES For normal operation, V For normal operation, V ISL3034E and ISL3036E only . CC . ISL3035E only ISL3035E only ISL3035E only > > FN6492.0 March 31, 2009 ...

Page 4

... V > 0.7V; ISL3035E Only > 0.7V ISL3035E Only ISL3034E and ISL3036E Only V rising falling GND; ISL3034E and ISL3036E Only V > 0.7V); ISL3035E Only I/OV = GND I/OV = GND L CC θ (°C/ unless otherwise noted. Typical values are at ...

Page 5

... I/OV , CLK_V Fall Time FVCC I/OV , CLK_RET Rise Time t L RVL 5 ISL3034E, ISL3035E, ISL3036E = +1.35V to +3.2V +1.8V and T = +25°C. (Note 6). (Continued TEST CONDITIONS IEC61000-4-2 Air-Gap Discharge IEC61000-4-2 Contact Discharge Human Body Model HBM, per JEDEC Machine Model, per JEDEC (Note 7) ...

Page 6

... I/OV L Test Circuits and Waveforms I/OV L 150Ω SIGNAL GENERATOR FIGURE 1A. TEST CIRCUIT FIGURE 1. I/ ISL3034E, ISL3035E, ISL3036E = +1.35V to +3.2V +1.8V and T = +25°C. (Note 6). (Continued TEST CONDITIONS R = 150Ω 15pF, S I/OVL C = 15pF CLK_RET R = 150Ω, C ...

Page 7

... SIGNAL EN GENERATOR I/OV L I/OV CC GND SW1 PARAMETER SW1 t GND ENL t V ENH L FIGURE 4A. TEST CIRCUIT 7 ISL3034E, ISL3035E, ISL3036E (Continued) I/OV L I/OV I/ OUTPUT PROPAGATION DELAY AND TRANSITION TIMES (PUSH - PULL) 1MΩ I/OV GND SW2 SW2 V CC I/OV GND FIGURE 3. I/OV OUTPUT ENABLE TIMES CC 1MΩ ...

Page 8

... I/OV pin) or down I/OV pin), and then drives the shifted level on the other CC side. The ISL3035E enables whenever V while the ISL3034E and ISL3036E enable AND V > 200mV Upon detecting a transition on either I/O pin, that channel’s accelerator circuitry actively drives the opposite side’s (output) pin to GND or the output’ ...

Page 9

... I/O and output pins, considerably reduces current consumption, and enables any pull-up resistors on a port’s I/O pins (see Table 1). The ISL3034E and ISL3036E enter the SHDN mode when the EN input switches low, or automatically when the V below the V voltage ...

Page 10

... IC. Therefore, the pins most likely to suffer an ESD event are those that are exposed to the outside world (typically I/OV pins in memory card CC applications) but the ISL3034E, ISL3035E, and ISL3036E feature IEC61000 ESD protection on all logic and I/O pins (both I/OV and I/ well as CLK pins). Unlike HBM ...

Page 11

... SWITCHING 6 I/ SWITCHING 4 I/ SWITCHING 1 I/OV INPUT CAPACITIVE LOAD (pF) FIGURE 13. V SUPPLY CURRENT vs I/OV L LOAD 11 ISL3034E, ISL3035E, ISL3036E V = 3.3V 1.8V 15pF +25°C; Unless Otherwise Specified. (Continued) A INPUTS L 3.2 3.4 3.6 SUPPLY FIGURE 10 INPUTS CC INPUTS ...

Page 12

... CAPACITIVE LOAD (pF) FIGURE 17. PROPAGATION DELAY vs I/OV LOAD 2.0 1.5 1.0 0.5 0 3.0 2.5 2.0 1.5 1.0 0 35pF L 0 TIME (4ns/DIV) FIGURE 19. I/OV OUTPUT WAVEFORMS (100Mbps ISL3034E, ISL3035E, ISL3036E V = 3.3V 1.8V 15pF +25°C; Unless Otherwise Specified. (Continued RVCC CAPACITIVE LOAD FIGURE 16. RISE/FALL TIME vs I/OV 3.4 3.2 3.0 2.8 2.6 2 CAPACITIVE FIGURE 18 ...

Page 13

... C = 15pF SOURCE T = +25°C; Unless Otherwise Specified. (Continued) A Die Characteristics SUBSTRATE AND TQFN/QFN THERMAL PAD POTENTIAL (POWERED UP): GND TRANSISTOR COUNT: ISL3034E, ISL3035E - 2600 ISL3036E - 2000 PROCESS: Si Gate BiCMOS = 150Ω, Data Rate = 100Mbps, push-pull driver, FN6492.0 March 31, 2009 ...

Page 14

... PIN # (DATUM B) (DATUM A) BOTTOM VIEW C L (A1 SECTION "C-C" 3.00 1.80 1.40 2.20 0.90 0.20 0.50 0.40 10 LAND PATTERN 14 ISL3034E, ISL3035E, ISL3036E L16.2.6x1. LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE SYMBOL θ 5 ...

Page 15

... Package Outline Drawing L14.3.5x3.5 14 LEAD QUAD DUAL FLAT NO-LEAD PLASTIC PACKAGE (QFN) Rev 0, 2/08 3.50 (4X) 0.15 TOP VIEW ( 2. 3.30 TYP ) ( 2.05) TYPICAL RECOMMENDED LAND PATTERN 15 ISL3034E, ISL3035E, ISL3036E A 6 PIN 1 INDEX AREA B 3.50 VIEW “A-A” (8x 0.50 1 14x 0. 0.60) NOTES 2.0 8x 0.50 6 PIN #1 INDEX AREA ...

Page 16

... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 16 ISL3034E, ISL3035E, ISL3036E L16.3x3A C A ...

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