74LCX540SJ Fairchild Semiconductor, 74LCX540SJ Datasheet
74LCX540SJ
Specifications of 74LCX540SJ
Related parts for 74LCX540SJ
74LCX540SJ Summary of contents
Page 1
... To ensure the high impedance state during power up or down, OE should be tied to V resistor: the minimum value of the resistor is determined by the current-sourcing capability of the driver. Ordering Information Package Order Number Number 74LCX540WM M20B 74LCX540SJ M20D (2) 74LCX540BQX MLP20B 74LCX540MSA MSA20 74LCX540MTC MTC20 Note: 2. DQFN package available in Tape and Reel only. ...
Page 2
... GND Pad Assignment for DQFN GND O 7 (Top View) Pin Descriptions Pin Names 3-STATE Output Enable Inputs –I Inputs –O Outputs 0 7 ©1995 Fairchild Semiconductor Corporation 74LCX540 Rev. 1.7.0 Logic Symbol Truth Table HIGH Voltage Level LOW Voltage Level Immaterial O 12 ...
Page 3
... T Free-Air Operating Temperature Input Edge Rate Notes Absolute Maximum Rating must be observed Unused inputs or I/O’s must be held HIGH or LOW. They may not float. ©1995 Fairchild Semiconductor Corporation 74LCX540 Rev. 1.7.0 Conditions Output in 3-STATE (3) Output in HIGH or LOW State V GND I V GND ...
Page 4
... Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW ( LOW-to-HIGH (t OSHL ©1995 Fairchild Semiconductor Corporation 74LCX540 Rev. 1.7.0 V (V) Conditions CC 2.3– ...
Page 5
... Dynamic Switching Characteristics Symbol Parameter V Quiet Output Dynamic Peak V OLP V Quiet Output Dynamic Valley V OLV Capacitance Symbol Parameter C Input Capacitance IN C Output Capacitance OUT C Power Dissipation Capacitance PD ©1995 Fairchild Semiconductor Corporation 74LCX540 Rev. 1.7.0 V (V) Conditions CC 3.3 C 50pF, V 3.3V 2.5 C 30pF, V 2.5V 3.3 C 50pF ...
Page 6
... DATA V mo OUT 3-STATE Output Low Enable and Disable Times for Logic Figure 2. Waveforms (Input Characteristics 1MHz, t Symbol ©1995 Fairchild Semiconductor Corporation 74LCX540 Rev. 1.7.0 (Generic for LCX Family 500 DUT C L 500 includes probe and jig capacitance) L Test Switch Open ...
Page 7
... Schematic Diagram (Generic for LCX Family) Input Stage Data ESD D2 N+/P– Input Stage P3 Enable ESD D4 N+/P– N3 ©1995 Fairchild Semiconductor Corporation 74LCX540 Rev. 1.7 GTO™ Output D6 N+/P– N5 www.fairchildsemi.com ...
Page 8
... Trailer (Hub End) Tape Dimensions inches (millimeters) Reel Dimensions inches (millimeters) Tape Size A 12mm 13.0 (330.0) 0.059 (1.50) 0.512 (13.00) 0.795 (20.20) 2.165 (55.00) 0.488 (12.4) ©1995 Fairchild Semiconductor Corporation 74LCX540 Rev. 1.7.0 Tape Number Section Cavities 125 (typ) Carrier 3000 75 (typ) ...
Page 9
... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
Page 10
... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
Page 11
... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
Page 12
... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
Page 13
... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
Page 14
... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...