DS75 DALLAS [Dallas Semiconductor], DS75 Datasheet - Page 13

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DS75

Manufacturer Part Number
DS75
Description
2.Wire Thermal Watchdog
Manufacturer
DALLAS [Dallas Semiconductor]
Datasheet

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NOTES:
1. All voltages are referenced to ground.
2. I/O pins of fast mode devices must not obstruct the SDA and SCL lines if V
3. I
4. I
5. After this period, the first clock pulse is generated.
6. The maximum t
7. A fast mode device can be used in a standard mode system, but the requirement t
8. Cb – total capacitance of one bus line in pF.
9.
TIMING DIAGRAMS Figure 6
SCL signal.
then be met. This will automatically be the case if the device does not stretch the LOW period of the
SCL signal. If such a device does stretch the LOW period of the SCL signal, it must output the next
data bit to the SDA line t
Internal heating caused by O.S. loading will cause the DS75 to read approximately 0.5 C higher if
O.S. is sinking the max rated current.
DD
DD
specified with O.S. pin open.
specified with V
HD:DAT
DD
has only to be met if the device does not stretch the LOW period (t
at 5.0V and SDA, SCL = 5.0V, 0 C to 70 C.
RMAX
+t
SU:DAT
= 1000+250 = 1250 ns before the SCL line is released.
13 of 13
DD
is switched off.
SU:DAT
250 ns must
LOW
) of the
DS75

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