LTC1757A-1 LINER [Linear Technology], LTC1757A-1 Datasheet - Page 9

• Manufacturer Part Number: LTC1757A-1
• Description: Single/Dual Band RF Power Controllers
• Manufacturer: LINER [Linear Technology]

APPLICATIO S I FOR ATIO
falling. If this voltage is high enough to produce RF output
power, the power/time or power ramp sidebands may not
meet specification. This problem can be avoided by start-
ing the DAC ramp from 100mV (Figure 1). At the end of the
cycle, the DAC can be ramped down to 0mV. This applies
a negative signal to the LTC1757A thereby ensuring that
the V
Another factor that affects power ramp sidebands is the
DAC signal to PCTL. The bandwidth of the LTC1757A is not
low enough to adequately filter out steps associated with
the DAC. If the baseband chip does not have an internal
filter, it is recommended that a 2-stage external filter be
placed between the DAC output and the PCTL pin. Resistor
values should be kept below 2k since the PCTL input
resistance is 100k. A typical filter scheme is shown in
Figure 2.
RF Input Voltage Levels
The LTC1757A does not actually detect RF power levels,
but detects peak RF voltage levels. The maximum peak RF
voltage level is 2V corresponding to 16dBm in a 50
system. The RF signal is normally supplied via a direc-
tional coupler. The directional coupler loss for the low
band is typically 19dB and for the high band 14dB. The
high band generally requires a 5dBm lower minimum
power level and to keep the minimum RF detector voltage
levels similar between both bands, the directional coupler
loss is adjusted accordingly.
The maximum RF input voltage or power restriction must
be considered when determining coupler loss require-
ments. If the RF power at the directional coupler is
increased due to losses after the coupler, the increased
power levels must not result in excessive RF voltages at
the RF pin. If 2dBm is lost after the directional coupler,
then the directional coupler loss should be increased by
PCA/B
outputs will ramp to 0V.
DAC
U
Figure 2
U
1k
1nF
1k
W
1nF
LTC1757A
PTCL
U
1757A F02
2dB. For example, if the maximum output requirement is
30dBm, but 32dBm is required at the directional coupler,
then the coupler loss should be at least 16dB. Remember
that excessive coupler loss will degrade low power
performance due to lower Schottky detector efficiencies.
If the directional coupler loss cannot be easily adjusted a
resistor network can be used as shown in Figure 3.
Demo Board
The LTC1757A has a demo board available upon request.
The demo board has a 900MHz and an 1800MHz RF
channel controlled by the LTC1757A. Timing signals for
TXEN are generated on the board using a 13MHz crystal
reference. The PCTL power control pin is driven by a
10-bit DAC and the DAC profile can be loaded via a serial
port. The serial port data is stored in a flash memory,
which is capable of storing eight ramp profiles. The board
is supplied preloaded with four GSM power profiles and
four DCS power profiles covering the entire power range.
External timing signals can be used in place of the internal
crystal controlled timing. A variety of RF power amplifier
channels are available.
LTC1757A Control Loop Stability
The LTC1757A provides a stable control loop for several
RF power amplifier models from different manufacturers
over a wide range of frequencies, output power levels and
V
can improve or degrade loop frequency stability.
1) The additional gain supplied by the RF power amplifier
increases the loop gain raising poles normally below the
0dB axis. The extra gain can vary significantly over input/
output power ranges, frequency, power supply, tempera-
ture and manufacturer. RF power amplifier gain control
SWR
LTC1757A
conditions. However, there are several factors that
RF
LTC1757A-1/LTC1757A-2
33pF
PLACE NEAR LTC1757A
ATTENUATOR
R1
180
30
R2
3dB
Figure 3
R3
180
DIRECTIONAL
COUPLER
50
1757A F03
BAND 1
BAND 2
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