CLC011 National Semiconductor, CLC011 Datasheet - Page 2

• Manufacturer Part Number: CLC011
• Description: Serial Digital Video Decoder
• Manufacturer: National Semiconductor

www.national.com
EAV
V
NC
SDI+, SDI−
SCI+, SCI−
NRZI
DESC
FE
V
VCP
NSP
TRS
PCLK
PD0–9
VDP
Connection Diagram
Pin Descriptions
EE
CC
Name
Pin No.
2, 4, 26
19–25,
27, 28
5, 6
7, 8
17,
10
11
12
13
14
15
16
18
1
3
9
End of active video flag. For component video, a logic low is output for one cycle of the
parallel clock every time an EAV timing reference is detected. The pulse is aligned with the
fourth word of the timing reference (the XYZ word). For composite video, this line is always
asserted high.
Negative supply pins.
Unused pin.
Differential serial data inputs.
Differential serial clock inputs.
A logic high at this pin enables NRZI-to-NRZ conversion.
A logic high at this pin enables descrambling.
Frame enable. Enables resynchronization of the parallel word at the next TRS.
Positive supply pin.
Parallel clock high level programming pin. The voltage at this supply pin defines the logic high
level for the parallel clock output.
New sync position. Indicates that the most recent TRS is in a new position relative to the
previous TRS. Remains high until the parallel rate clock is aligned properly with the TRS.
Timing reference flag. A logic low is output for the duration of the TRS.
Parallel clock output. The rising edge of this clock is located at the center of the parallel data
window.
Parallel data outputs.
Parallel data high level programming pin. The voltage at this supply pin defines the logic high
level for the data outputs.
Order Number CLC011ACQ, or CLC011BCQ
See NS Package Number V28A
28-Pin PLCC
2
Description
DS100086-2